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By adopting an amorphous Y 2 O 3 passivation layer, which provides a wide band gap and well passivates Ge surface without the presence of GeO x , a high-permittivity ͑͒ crystalline ZrO 2 / Y 2 O 3 stack was explored as the gate dielectric for Ge metal-oxide-semiconductor ͑MOS͒ devices on Si substrate. The crystalline ZrO 2 is a Ge stabilized tetragonal/cubic dielectric with the value of 36.1 and was formed by depositing a ZrO 2 / Ge/ ZrO 2 laminate and a subsequent 500°C annealing. The high-crystalline ZrO 2 / Y 2 O 3 gate stack shows promising electrical characteristics in terms of low interface trap density of 5.8ϫ 10 11 cm −2 eV −1 , negligible hysteresis, and leakage current of 5.6 ϫ 10 −4 A / cm 2 at gate bias of flatband voltage ͑V FB ͒ 1 V for equivalent oxide thickness of 1.13 nm. This gate stack not only demonstrates the eligibility for advanced Ge MOS devices but introduces a more reliable process to form a high-crystalline gate dielectric.