Artificial Neural Networks (ANNs) have become an accepted approach for a wide range of challenges. Meanwhile, the advancement of chip manufacturing processes is approaching saturation which calls for new computing solutions. This work presents a novel approach of an FPGA-based accelerator development for fully connected feed-forward neural networks (FFNNs). A specialized tool was developed to facilitate different implementations, which splits FFNN into elementary layers, allocates computational resources and generates high-level C++ description for high-level synthesis (HLS) tools. Various topologies are implemented and benchmarked, and a comparison with related work is provided. The proposed methodology is applied for the implementation of high-throughput virtual sensor.

The combination of machine learning and heterogeneous embedded platforms enables new potential for developing sophisticated control concepts which are applicable to the field of vehicle dynamics and ADAS. This interdisciplinary work provides enabler solutions -ultimately implementing fast predictions using neural networks (NNs) on field programmable gate arrays (FPGAs) and graphical processing units (GPUs)- while applying them to a challenging application: Torque Vectoring on a multi-electric-motor vehicle for enhanced vehicle dynamics. The foundation motivating this work is provided by discussing multiple domains of the technological context as well as the constraints related to the automotive field, which contrast with the attractiveness of exploiting the capabilities of new embedded platforms to apply advanced control algorithms for complex control problems. In this particular case we target enhanced vehicle dynamics on a multi-motor electric vehicle benefiting from the greater degrees of freedom and controllability offered by such powertrains. Considering the constraints of the application and the implications of the selected multivariable optimization challenge, we propose a NN to provide batch predictions for real-time optimization. This leads to the major contribution of this work: efficient NN implementations on two intrinsically parallel embedded platforms, a GPU and a FPGA, following an analysis of theoretical and practical implications of their different operating paradigms, in order to efficiently harness their computing potential while gaining insight into their peculiarities. The achieved results exceed the expectations and additionally provide a representative illustration of the strengths and weaknesses of each kind of platform. Consequently, having shown the applicability of the proposed solutions, this work contributes valuable enablers also for further developments following similar fundamental principles.

Infrared imaging sensors are frequently used in thermal signature detection applications in industrial, automotive, military and many other areas. However, advanced infrared detectors are generally associated with high costs and complexity. Infrared detectors usually necessitate a thermoelectric heater–cooler for temperature stabilization and various computationally complex preprocessing algorithms for fixed pattern noise (FPN) correction. In this paper, we leverage the benefits of uncooled focal plane arrays and describe a complete digital circuit design for Field Programmable Gate Array (FPGA)-based infrared image acquisition and pre-processing. The proposed design comprises temperature compensation, non-uniformity correction, defective pixel correction cores, spatial image transformation and registration with RGB images. When implemented on Xilinx Ultrascale+ FPGA, the system achieves a throughput of 30 frames per second using the Fraunhofer IMS Digital 17 μm QVGA-IRFPA with a microbolometer array size of 320 × 240 pixels and an RGB camera with a 1024 × 720 resolution. The maximum ratio of the standard deviation to the mean of 0.35% was achieved after FPN correction.

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