We report a general approach for three-dimensional (3D) multifunctional electronics based on the layer-by-layer assembly of nanowire (NW) building blocks. Using germanium/silicon (Ge/Si) core/shell NWs as a representative example, ten vertically stacked layers of multi-NW fieldeffect transistors (FETs) were fabricated. Transport measurements demonstrate that the Ge/Si NW FETs have reproducible high-performance device characteristics within a given device layer, that the FET characteristics are not affected by sequential stacking, and importantly, that uniform performance is achieved in sequential layers 1 through 10 of the 3D structure. Five-layer single-NW FET structures were also prepared by printing Ge/Si NWs from lower density growth substrates, and transport measurements showed similar high-performance characteristics for the FETs in layers 1 and 5. In addition, 3D multifunctional circuitry was demonstrated on plastic substrates with sequential layers of inverter logical gates and floating gate memory elements. Notably, electrical characterization studies show stable writing and erasing of the NW floating gate memory elements and demonstrate signal inversion with larger than unity gain for frequencies up to at least 50 MHz. The ability to assemble reproducibly sequential layers of distinct types of NW-based devices coupled with the breadth of NW building blocks should enable the assembly of increasing complex multilayer and multifunctional 3D electronics in the future.Over the past several years, semiconductor NWs 1,2 and carbon nanotubes 3 have been actively explored as the potential materials for future electronic components. These chemically derived single-crystalline nanostructures present unique advantages over conventional semiconductors, as they enable integration of high-performance device elements onto virtually any substrate 4-6 with scaled on-currents and switching speeds higher than state-of-the-art planar Si structures. 7,8 These unique electrical properties and the intrinsically miniaturized dimensions of NW and carbon nanotube building blocks may facilitate the continuation of Moore's law and the evolutionary quest for ever faster and smaller electronics well into the future. More uniquely, the capability of assembling high-performance NW building blocks with diverse functional properties could enable novel circuit concepts such as 3D integrated electronics, 9 where 3D structure arises from sequential assembly 10-12 of NWs into vertically stacked device layers.Indeed, there has been considerable interest in multilayer electronics, as they offer a more efficient interconnection and processing of digital information. [13][14][15] However, materials-and fabrication-related challenges have presented major obstacles in achieving truly 3D integrated circuits based on the conventional Si CMOS technology, and the need for a new technology remains critical. Here, we report the monolithic integration of individual and parallel arrays of crystalline NWs as multifunctional and multilayer circuits...

A general strategy for the parallel and scalable integration of nanowire devices over large areas without the need to register individual nanowire−electrode interconnects has been developed. The approach was implemented using a Langmuir−Blodgett method to organize nanowires with controlled alignment and spacing over large areas and photolithography to define interconnects. Centimeter-scale arrays containing thousands of single silicon nanowire field-effect transistors were fabricated in this way and were shown to exhibit both high performance with unprecedented reproducibility and scalability to at least the 100-nm level. Moreover, scalable device characteristics were demonstrated by interconnecting a controlled number of nanowires per transistor in “pixel-like” device arrays. The general applicability of this approach to other nanowire and nanotube building blocks could enable the assembly, interconnection, and integration of a broad range of functional nanosystems.

The merger of nanoscale building blocks with flexible and/or low cost substrates could enable the development of high-performance electronic and photonic devices with the potential to impact a broad spectrum of applications. Here we demonstrate that high-quality, single-crystal nanowires can be assembled onto inexpensive glass and flexible plastic substrates to create basic transistor and light-emitting diode devices. In our approach, the high-temperature synthesis of single-crystal nanowires is separated from ambient-temperature solution-based assembly to enable the fabrication of single-crystal-like devices on virtually any substrate. Silicon nanowire field-effect transistors were assembled on glass and plastic substrates and display device parameters rivaling those of single-crystal silicon and exceeding those of state-of-the-art amorphous silicon and organic transistors currently used for flexible electronics on plastic substrates. Nanowire transistor devices have been configured as low-threshold logic elements with gain; moreover, the high-performance characteristics are relatively unaffected by operation in a bent configuration or by repeated bending. The generality of this approach is further illustrated with the assembly of gallium nitride nanowire UV-light-emitting diodes on flexible plastic substrates. These results suggest that nanowires could serve as high-performance building blocks for the next of generation lightweight display, mobile computing, and information storage applications.

Macroelectronic circuits made on substrates of glass or plastic could one day make computing devices ubiquitous owing to their light weight, flexibility and low cost. But these substrates deform at high temperatures so, until now, only semiconductors such as organics and amorphous silicon could be used, leading to poor performance. Here we present the use of low-temperature processes to integrate high-performance multi-nanowire transistors into logical inverters and fast ring oscillators on glass substrates. As well as potentially enabling powerful electronics to permeate all aspects of modern life, this advance could find application in devices such as low-cost radio-frequency tags and fully integrated high-refresh-rate displays.

The merger of nanoscale devices with flexible, low cost plastics could enable a broad spectrum of electronic and photonic applications, although difficulties in processing plastics at the nanoscale have limited exploration of this potential. Here we describe the use of room temperature nanoimprint lithography for the general fabrication of nanometer-through millimeter-scale patterns on polymer substrates. Specifically, we demonstrate the patterning of arrays of nanoscale source−drain electrode pairs with continuous interconnects to the millimeter length scale, and the fabrication of hundred-nanometer gate features hierarchically patterned over large areas. These patterned plastic substrates have also been used in conjunction with semiconductor nanowires to assemble field-effect transistors.