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Geologic mapping and the study of an area in the i:;^; part of the Three Forks one "degree quadrangle was sUfl^jte^,^,;.;^^^ .:^-; .?summer of 1938 as a doctorate thesis problem i^^^^^ 1-'s-J-*-^-:-> the summers of 1939*41. after which the work was y fv. .»-World War U, The work done before* the war was aoeooapUslsBd '' the aid of scholarship grants from the YeUowstone-Bighorn Research!

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Image rendering is the performance bottleneck in many computer-graphics systems today because of its computation-intensive nature. Described here is a one-chip VLSI implementation of a shaded-polygon renderer which provides an affordable solution to the bottleneck. The chip takes advantage of a unique extension to Bresenham's vector drawing algorithm [1] to interpolate four axes (for Red, Green, Blue and Z) across a polygon, in addition to the X and Y values. Its inherent accuracy and ease of high-speed hardware implementation distinguish this new algorithm from interpolation with incrementing fractions (DDA).This chip was designed as part of a workstation primarily for mechanical engineering CAD applications. The pipelining and internal bandwidth possible on the chip allows rendering speeds of over twelve-thousand, 1000-pixel, shaded polygons per second, suitable for interactive manipulation of solids. Described in this paper is the derivation of the new algorithm and its implementation in a pipelined, polygon-rendering chip.