We consider the synthesis of a reactive module with input x and output y, which is specified by the linear temporal formula ~(2, y). We show that there exists a program satisfying 'P iff the branching time formula (Vx)(Zly)A~(z, y) is valid over all tree models. For the restricted case that all variables range over finite domains, the validity problem is decidable, and we present an algorithm for constructing the program whenever it exists. The algorithm is based on a new procedure for checking the emptiness of Rabin automata on infinite trees in time exponential in the number of pairs, but only polynomial in the number of states. This leads to a synthesis algorithm whose complexity is double exponential in the length of the given specification.

This paper considers the problem of synthesizing a finite-state distributed reactive system. Given a distributed architecture A, identifying several processors 9 , . . . , 9, and their interconnection scheme, and a propositional temporal specification 'P, a solution to the synthesis problem consists of finite-state programs II1, . . . , I I k (one for each processor), whose joint (synchronous) behavior maintains ' P against all possible inputs from the environment. We refer to such a solution as the realization of the specification ' P over the architecture A. The work reported here extends the finite-state reactive synthesis studies reported in [PR88, PR89aI and also in [ALW89], that did not impose a given architecture, and hence standardly yielded a solution based on the easiest architecture, that of a single processor.Specifically, we show that the problem of realizing a given propositional specification over a given architecture is undecidable, and it is nonelementarily decidable for the very restricted class of hierarchical architectures. These results are based on Peterson and Reif's [PR79] work on games of incomplete information. We further give an extensive characterization of architecture classes for which the realizability problem is elementarily decidable, and of classes for which it is undecidable. 'hovot 76100, Israel. Email: ami&wisdom.weizmann.ac.IL, roni@wisdom.weizmann.ac.IL .Another approach to the implementation of ' P over A is to synthesize first (using the technique of [PR89a]) a single processor strategy that satisfies 'P, and then to decompose this specific strategy into a set of programs . . . , n k for A. The problem of decomposing a given finite-state program for a single processor into a set of programs over a given architecture A is shown to be decidable for all acyclic architectures.

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This paper performs a comprehensive investigation of dynamic selection for long atomic traces. It introduces a classification of trace selection methods and discusses existing and novel dynamic selection approaches-including loop unrolling, procedure inlining and incremental merging of traces based on dynamic bias. The paper empirically analyzes a number of selection schemes in an idealized framework. Observations based on the SPEC-CPU2000 benchmarks show that: (a) selection based on dynamic bias is necessary to achieve the best performance across all benchmarks, (b) the best selection scheme is benchmark and maximum trace-length specific, (c) simple selection, based on program structure information only, is sufficient to achieve the best performance for several benchmarks. Consequently, two alternatives for the trace selection mechanism are established: (a) a "best performance" approach relying on complex dynamic criteria; (b) a "value" approach that provides the best performance (and potentially the best power consumption) based on simpler static criteria. Another emerging alternative advocates adaptive based mechanisms to adjust selection criteria.