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Producing graphics is a time-consuming task. How best to use multiple processors in speeding the work is still an open question. For many applications, a multiprocessor approach based on the Disney multiplane camera produces a natural mapping of processors to objects in a scene. Such a distribution promotes parallelism and reduces the hiddensurface work with minimal inter-processor communication and low overhead.I am developing an architecture that uses this approach. In the architecture, a master processor controls the system components and provides the user interface. The system components include a number of slave processors, each with a private memory and a frame buffer. To display an image, the master processor first subdivides the scene's view volume along the z(depth)-axis and assigns each portion of the view volume to a slave processor. The master processor then broadcasts object information to the slaves. A slave has responsibility for any object that intersects its portion of the view volume. Each slave transforms its object(s) as directed, places the resulting image in its frame buffer, and signals the master when it is finished. A slave has no need to communicate with other slaves, so its completion time is determined solely by the complexity of the task assigned to it by the master.Each slave's frame buffer has a priority based on the depth of the portion of the view volume assigned to the slave. A hardware filter assembles the final image from the prioritized contents of the frame buffers to produce the stream of video refresh information. An image of higher priority will block an image with lower priority. I+om each frame buffer the system fetches information corresponding to the currently scanned pixel in the final image. The information is sent in parallel to the filter's inputs. The filter's output is the image of highest priority occupying that pixel. This information is sent to the video monitor for display.Analysis indicates that the architecture's division of labor speeds image generation, regardless of the type of hidden-surface algorithm used. To compare the architecture's performance to that of a conventional uniprocessor, I am performing simulations that measure the behavior of hidden-surface algorithms on the two systems. The simulations include the overhead costs of dividing the view volume and distributing the object information.The initial simulation runs were for the case in which each object intersects only one slave's portion of the view volume. For the depth-buffer algorithm, the speedup is nearly linear aa slave processors are added. For the scanline algorithm, the speedup is better than linear but less than n31a.I am currently running additional simulations and am in the process of verifying the hardware design. 435

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