The common Passive Voltage Contrast localization method in Focused Ion Beams and Scanning Electron Microscopes can be used for failure localization issues. These methods became widely accepted in the semiconductor failure analysis community. Nearly all labs make use of it. The Active Voltage Contrast method works with additional external voltages applied inside the chamber to certain structures at the sample surface and offers even more localization possibilities. A comprehensive overview over all phenomena related to Voltage Contrast generation is given and the multiple advantages, possibilities and limits of VC failure localization are systemized and discussed
This study captures the time-dependent dielectric breakdown kinetics in nanoscale Cu/low-k interconnect structures, applying in-situ transmission electron microscopy (TEM) imaging and post-mortem electron spectroscopic imaging (ESI). A 'tip-to-tip' test structure and an experimental methodology were established to observe the localized damage mechanisms under a constant voltage stress as a function of time. In an interconnect structure with partly breached barriers, in-situ TEM imaging shows Cu nanoparticle formation, agglomeration and movement in porous organosilicate glasses. In a flawless interconnect structure, in-situ TEM imaging and ESI mapping show close to no evidence of Cu diffusion in the TDDB process. From the ESI mapping, only a narrow Cu trace is found at the SiCN/OSG interface. In both cases, when barriers are breached or still intact, the initial damage is observed at the top interface of M1 between SiCN and OSG
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