The essential functionality of photonic and electronic devices is contained in thin surface layers leaving the substrate often to play primarily a mechanical role. Layer transfer of optimised devices or materials and their heterogeneous integration is thus a very attractive strategy to realise high performance, low-cost circuits for a wide variety of new applications. Additionally, new device configurations can be achieved that could not otherwise be realised. A range of layer transfer methods have been developed over the years including epitaxial lift-off and wafer bonding with substrate removal. Recently, a new technique called transfer printing has been introduced which allows manipulation of small and thin materials along with devices on a massively parallel scale with micron scale placement accuracies to a wide choice of substrates such as silicon, glass, ceramic, metal and polymer. Thus, the co-integration of electronics with photonic devices made from compound semiconductors, silicon, polymer and new 2D materials is now achievable in a practical and scalable method. This is leading to exciting possibilities in microassembly. We review some of the recent developments in layer transfer and particularly the use of the transfer print technology for enabling active photonic devices on rigid and flexible foreign substrates

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A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-tothe-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 -0.49 A/W in the O band. The integrated PDs (30×40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

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Type of publicationArticle (peer-reviewed)Link to publisher's version http://dx.doi.org/10.1364/OME.7.004408Access to the full text of the published version may require a subscription. Rights