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A low power 8T global shutter pixel with extended FD voltage swing range is proposed for large format high speed CMOS image sensor. The pixel has a negative threshold reset transistor, two in-pixel source followers, and a sample-and-hold circuit. The in-pixel first source follower is employed for reducing the pixel average current and maximum transient current. The negative threshold reset transistor is applied to extend the voltage swing of FD. Using pixel level sample-and-hold circuit, the kTC noise on FD node can be effectively nullified by correlated double sampling operation. A high speed 1000 fps 256 × 256 CMOS image sensor is implemented in 0.18 µm CMOS process. Two 10-bit cyclic ADC arrays are integrated in this prototype sensor chip. The active area of the chip is 10 mm × 7 mm with a pixel size of 14 µm × 14 µm. The developed sensor achieves an average current of 23 nA per pixel, a maximum transit current per pixel as low as 1113 nA, and a large FD voltage swing of 1.78 V. The sensor temporal noise level is 103 e− and full well capacity has 27000 e− which results in 48.3 dB signal dynamic range.Keywords global shutter, CDS, low power, negative threshold reset transistor, high speed image sensor CitationZhou Y F, Cao Z X, Han Y, et al. A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor.