This article presents the design of a 2.4 GHz low power high gain and high linearity current‐reused CMOS low noise amplifier (LNA) using modified derivative superposition (MDS) technique with bulk‐bias control. The MDS technique with bulk‐bias control is used to extend the auxiliary transistor's bias control range and enhance the linearity performance. The current‐reused topology is utilized to fulfill the low power consumption and high gain, simultaneously. The proposed LNA is fabricated in a 0.18‐μm 1P6M SiGe BiCMOS process and consumes a 6.53 mA quiescent current from a 1 V voltage supply. The measurement results show that the proposed LNA achieves a 24.1 dB power gain, 1.7 dB NF, −18 dB input P1dB, 8.75 dBm IIP3, 13.9 and 19.5 dB input and output return loss, respectively. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:2444–2446, 2014

A 2.5-GHz low power high gain and high linearity CMOS low noise amplifier (LNA) is presented. The modified derivative superposition (MDS) technique is employed to improve the linearity performance. The bulkbias control of auxiliary transistor (AT) in MDS technique is used to extend the AT's bias control range. The currentreused topology is utilized to full-fill the low power consumption and high gain simultaneously. The proposed LNA is fabricated in a 0.18-um 1P3M RF CMOS process and consumes a 4.36-mA quiescent current from a 1V voltage supply. The measurement results show that the proposed LNA achieves 20.1dB power gain, 1.44dB NF, -17.5-dB input P1dB, 8.9-dBm IIP3, 26.4-dB and 20.9-dB input and output return loss, respectively. Key words: Current-reused; Bulk-bias control; Modified derivative superposition technique; LNA; INTRODUCTIONWith the advance of wireless communication system and technology in recent years, many wireless electronic products such as smart-phone become more portable, power-saving, and also provide a greater variety of services. Low noise figure, low power consumption, high gain and high linearity [i.e., the third-order intercept (IIP3)] of RF amplifiers such as LNA are demanded by and extremely important to wires communication system. However, it's almost impossible to achieve a strategy which can face the all desired performance. To date, two mode design strategy are adopt to achieve desired goals, one is high gain, low noise but low linearity for small desired signal with small interference and another is low gain, high linearity but high noise for large desired signal with large interference [1][2][3][4][5][6][7][8].Among the variety of conventional LNA input topologies, such as resistive match common source (CS), common gate (CG), and resistive feedback CS topologies, the source inductive degeneration CS input topology shows the most promising solution. In the circuit level, the current-reused structure is adopted to full-fill the low power consumption and high gain, simultaneously [1] [2].In order to achieve high linearity, several approaches such as the current amplification technique, feed-forward distortion cancellation technique, and the derivative superposition (DS) technique have been proposed to enhance the linearity of CMOS amplifiers [3][4][5] [9]. The derivative superposition technique, a non-linearity compensation method of trans-conductance, is one of the most effective ways to improve linearity in practical applications. The derivative superposition technique, also known as multiple gated transistors (MGTRs), uses an auxiliary transistor(AT), which is properly sized and biased to compensate for the third-order nonlinearity ( the second derivative of transconductance) of trans-conductance of the main transistor(MT), resulting in the total third-order nonlinearity trans-conductance will be closed to zero [3][4][5][6][7][8][9][10][11].In this paper, the design and implementation of a 2.5GHz current reused topology (which utilizing a capacitance as RF signal coupler) low noi...

A fully integrated 0.6 V low-noise amplifier (LNA) for X-band receiver application based on 0.18 μm RFSOI CMOS technology is presented in this paper. To achieve low noise and high gain with the constraint of low voltage and low power consumption, a novel modified complementary current-reused LNA using forward body bias technique is proposed. A diode connected MOSFET forward bias technique is employed to minimize the body leakage and improve the noise performance. A notch filter isolator is constructed to improve the linearity of low voltage. The measured results show that the proposed LNA achieves a power gain of 11.2 dB and a noise figure of 3.8 dB, while consuming a DC current of only 1.6 mA at supply voltage of 0.6 V.

SUMMARYA duplex current-reused complementary metal-oxide-semiconductor low-noise amplifier (LNA) is proposed for 2.5-GHz application. The duplex current-reused topology with equivalent three common-source gain stages cascaded is utilized to fulfil the low-power consumption and high gain simultaneously. The complementary derivative superposition linearization technique with bulk-bias control is employed to improve the linearity performance with large-signal swing and to extend the auxiliary transistors bias-control range. The proposed LNA is fabricated in a 0.18-um 1P5M complementary metal-oxide-semiconductor process and consumes a 3.13-mA quiescent current from a 1.5 V voltage supply. The measurement results show that the proposed LNA achieves power gain of 28.1 dB, noise figure of 1.64 dB, input P1dB and IIP3 of À19.6 dBm and 3.2 dBm, respectively, while the input and output return loss is 19.2 dB and 18.4 dB.