We present a single-photon avalanche diode (SPAD)
front-end circuitry, in a cost-effective 0.35 μm CMOS technology,
for single-photon detection in the visible wavelength range, aimed
at speeding up the sensing of detector ignition and at promptly
quenching the avalanche current buildup. The circuit allows the
reduction in detrimental effects of afterpulsing through reducing
any delays in the electronics intervention on the detector and
through a proper time-varying action of the MOS transistors on
the different SPAD’s operating conditions. The sensing time is
reduced down to a few hundreds of picoseconds, with an active
quenching transition of about 1 ns for 6 V excess bias, and a
final reset in just 3 n
This paper reports the design and the characterization of Single-Photon Avalanche Diodes (SPADs) fabricated in a standard 0.35 um CMOS technology aimed at very low noise and sharp timing response. We present the investigation on the breakdown voltage, photon detection efficiency (PDE), dark count rate (DCR) and timing response on devices with different dimensions and shapes of the active area. Results show uniform breakdown voltage among different structures, PDE above 50% at 420 nm, DCR below 50 cps at room temperature and timing response with no exponential tail and typical full-width at half-maximum of 77 ps and 120 ps for 10 um and 30 um active areas, respectively. The fabricated devices enable the fabrication of imagers with CMOS SPAD arrays suitable for advanced applications demanding extremely low noise and picosecond timing accuracy
"Indirect" time-of-flight is one technique to obtain depth-resolved images through active illumination that is becoming more popular in the recent years. Several methods and light timing patterns are used nowadays, aimed at improving measurement precision with smarter algorithms, while using less and less light power. Purpose of this work is to present an indirect time-of-flight imaging camera based on pulsed-light active illumination and a 32 × 32 single-photon avalanche diode array with an improved illumination timing pattern, able to increase depth resolution and to reach single-photon level sensitivity.
We designed and characterized Silicon Single-Photon Avalanche Diodes (SPADs) fabricated in a high-voltage 0.35 μm
CMOS technology, achieving state-of-the-art low Dark Counting Rate (DCR), very large diameter, and extended Photon
Detection Efficiency (PDE) in the Near Ultraviolet. So far, different groups fabricated CMOS SPADs in scaled
technologies, but with many drawbacks in active area dimensions (just a few micrometers), excess bias (just few Volts),
DCR (many hundreds of counts per second, cps, for small 10 μm devices) and PDE (just few tens % in the visible
range). The novel CMOS SPAD structures with 50 μm, 100 μm, 200 μm and 500 μm diameters can be operated at room
temperature and show DCR of 100 cps, 2 kcps, 20 kcps and 100 kcps, respectively, even when operated at 6 V excess
bias. Thanks to the excellent performances, these large CMOS SPADs are exploitable in monolithic SPAD-based arrays
with on-chip CMOS electronics, e.g. for time-resolved spectrometers with no need of microlenses (thanks to high fillfactor).
Instead the smaller CMOS SPADs, e.g. the 10 μm devices with just 3 cps at room temperature and 6 V excess
bias, are the viable candidates for dense 2D CMOS SPAD imagers and 3D Time-of-Flight ranging chips
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