High-speed low-resolution ADCs power consumption can be reduced with calibration that, however, presents some drawbacks like allocating a calibration time, calibration algorithm complexity, and calibration circuit implementation. In alternative, this paper presents a 1Gs/s 5-bit ADC without calibration, fabricated in a 90nm-CMOS. The device is based on the use of an improved version of double tail dynamic comparator that is designed to operate with a fixed bias current. This comparator presents a reduced kickback noise, allowing increasing the input transistors sizes. This improves matching and calibration is not needed. The resulting ADC performs 4.3b-ENOB up to Nyquist frequency at 1Gs/s, while consuming 7.65mW from a 1.2V supply. The ADC FoM of about 0.39pJ/conv that is at the state-of-the-art in this resolution&sampling frequency combination.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
customersupport@researchsolutions.com
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.
Copyright © 2024 scite LLC. All rights reserved.
Made with đź’™ for researchers
Part of the Research Solutions Family.