Abstract:In this paper a low consumption 10 bits pipelined analogue to digital converter (ADC) by using a new operational transconductance amplifier (OTA) is introduced. The ADC is designed to work at 100 MHz with 1 volt bias voltage in a CMOS 90 nm technology. The simulation results at frequency of 5 MHz show the spurious free dynamic range and signal to noise ratio of 66 dB and 58.4 dB (9.4 ENOB) respectively. The power consumption for the designed ADC including digital and analogue parts is 14.4 mW.
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