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We have studied electromiyation (EM) and stress-induced voiding (SV) behaviors based on our 90nm-node Cuilow-k interconnect processes, and demonstrated successful improvement of the interconnect reliability. In EM study wide bimodal failure distribution was found only in the particular EM test structure. We identified that it caused by the lack of wettability between Cu and the barrier metal in the vias, and demonstrated that the ,optimization of the barrier metal thickness could suppress it. In SV behavior, we revealed a mechanism of the voiding under the vias that was due to the initial existence of the nuclei of the void before high temperature storage test. The failure mode was suppressed by optimizing preheat temperature of M2 barrier metal deposition.interconnects for 90nm-node system LSIs. Dimensions of both minimum line width and space are 120nm for M I, and 140nm for M2 to M5 with minimum via size of 140ntn. Here, the via-first trench-last Cu dual-damascene process was applied with low-k dielectrics patterned by high NA ArF lithography. Dielectrics structures were Si02iSiC for the MI inna-level and the SiOCiSi02 hybrid sttucture with S i c diffusion barrier dielectric for the M2 to M5 intra-and inter-level. The electrochemical deposited (ECE) Cu on physical vapor deposited (PVD) Cu seed that lies on Td?

A stacked image sensor with a 0.9 μm pixel size fabricated by using organic photoconductive film (OPF) was realized. It is the first trial to introduce an active material, that is, an organic semiconductor into the BEOL process. This pixel structure is fabricated by using a standard 45 nm BEOL process. However, after OPF deposition, it is essential to restrict the thermal budget and to avoid oxygen, moisture, and plasma irradiation. By controlling the above conditions, a demonstration of a stacked image sensor with OPF, which has high sensitivity, high saturation charge, and a wide incident light angle, was successfully performed.Introduction As the pixel size of image sensors shrinks, new technologies dependant on BEOL, such as lightpipes [1], the separation walls of on-chip color filters (OCFs) [2], and backside illumination (BSI) [3], have been widely developed and introduced into mass production recently. Pixel size has shrunk to nearly 1.0 μm.However, as silicon has a low absorption coefficient, the depth of photodiodes should be larger than 3 μm to ensure sensitivity regardless of pixel size, i.e., as pixel size becomes small, the aspect ratio of photodiode must be large. As a result, the leakage of light to the neighboring pixels in a photodiode increases. This leads to narrow incident light angles.To suppress the leakage of light and achieve wide incident light angles at a small pixel size, it is necessary to develop a stacked image sensor with another photoconductive film that works effectively even if it becomes thinner.Recently, organic semiconductors have been applied to photoelectric conversion devices, such as light emitting diodes, illumination, and solar cells [4, 5]. Some organic materials have a higher absorption coefficient than does silicon, as shown in Fig. 1. Therefore, in image sensors, the thickness of photoelectric conversion film (photodiode) can be decreased to under 0.5 μm by using organic materials, as shown in Fig. 2. This makes it possible to have both a high sensitivity and a wide incident light angle [6] at a pixel size under 1.0 μm.Because organic photoconductive film (OPF) is not so robust, there are some problems that must be overcome in order to introduce it into the BEOL process. It is necessary to restrict the thermal budget and to avoid oxygen, moisture, and plasma irradiation, which includes ultraviolet light.In addition to the above problems, in stacked image sensors, which are different from normal CMOS image sensors, the capacitance of lower pixel electrodes as well as plugs affects the electronic crosstalk of adjacent pixels, so that deciding both the pixel structure and the position of the lower pixel electrodes becomes important problem.In this work, to solve the above problems, we considered where the OPF, lower pixel electrodes, and global layer should be placed and proposed two structures: an "OPF over global layer" and an "OPF under global layer."Pixel Structure using OPF This stacked image sensor used 45 nm CMOS technologies on a 300 mm wafer. Three Cu fine laye...

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Formerly, only pulse radar and the Murray loop bridge could be utilized in a cable fault location method that is applicable to branch lines. Those methods need a terminal connection at the far end. Therefore, it is difficult in fault location involving branch lines. Pulse radar is applicable only for high‐resistance ground faults and the Murray loop bridge is applicable only for low‐resistance ground faults. We have developed current‐detection pulse radar and tested it. In high‐resistance ground fault location, the measured result includes discharge delay error. Therefore, we have proposed an error correction method and confirmed it. In addition, we have designed a new cable fault location method of pulse radar and tested it. © 2000 Scripta Technica, Electr Eng Jpn, 134(2): 19–28, 2001