We describe the design and demonstration of an extended generalized shuffle interconnection network, centrally controlled by a personal computer. A banyan interconnection pattern is implemented by use of computer-generated Fourier holograms and custom metallization at each 32 × 32 switching node array. Each array of electrically controlled tristate symmetric self-electro-optic-effect devices has 10,240 optical pinouts and 32 electrical pinouts, and the six-stage system occupies a 9 in. × 12.5 in. (22.9 cm × 31.7 cm) area. Details of the architecture, optical and mechanical design, and system alignment and tolerancing are presented.

The design, construction, and operational testing of a five-stage, fully interconnected 32 × 16 switching fabric by the use of smart-pixel (2, 1, 1) switching nodes are described. The arrays of switching nodes use monolithically integrated GaAs field-effect transistors, multiple-quantum-well p-i-n detectors, and self-electro-optic-device modulators. Each switching node incorporates 25 field-effect transistors and 17 p-i-n diodes to realize two differential optical receivers, the 2 × 1 node switching logic, a single-bit node control memory, and one differential optical transmitter. The five stages of node arrays are interconnected to form a two-dimensional banyan network by the use of Fourier-plane computer-generated holograms. System input and output are made by two-dimensional fiber-bundle matrices, and the system optical hardware design incorporates frequency-stabilized lasers, pupil-division beam combination, and a hybrid micro-macro lens for fiber-bundle imaging. Optomechanical packaging of the system ut lizes modular kinematic component positioning and active thermal control to enable simple rapid assembly. Two preliminary operational experiments are completed. In the first experiment, five stages are operated at 50 Mbits/s with 15 active inputs and outputs. The second experiment attempts to operate two stages of second-generation node arrays at 155 Mbits/s, with eight of the 15 active nodes functioning correctly along the straight switch-routing paths.

A prototype digital free-space photonic switching fabric is demonstrated. It consists of three cascaded 16 x 8 arrays of symmetric self-electro-optic-effect devices that are used as logic gates that implement part of a multistage interconnection network. We discuss architecture, device tolerancing, optical system design, and optomechanical design. This optical circuit is successfully configured as a fully operational array of 32 independent 2 x 2 nodes and operates at 100 kHz.

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Several different shuffle-equivalent interconnection topologies that can be used within the optical link stages of photonic-switching networks are studied. These schemes include the two shuffle, the two banyan, and the segmented two shuffle, which can be used to interconnect two-input, two-output switching nodes. The schemes also include the four shuffle and the four banyan, which can be used to interconnect four-input, four-output switching nodes. (Note: The segmented two shuffle and the four banyan are novel interconnection topologies that were developed to satisfy some of the constraints of free-space digital optics). It is shown that each of these interconnection topologies can be implemented by the use of relatively simple imaging optics that contain space-invariant computer-generated binaryphase gratings. The effects of node type and interconnection topology on the laser power requirements and the optical component complexity within the resulting systems are also studied. The general class of networks nown as extended generalized shuffle networks is used as a baseline for the analysis. It is shown that (2, 1, 1) nodes and (2, 2, 2) nodes connected by two-banyan interconnections can produce power-efficient and cost-effective systems. The results should help identify the architectural trade-offs that exist when a node type and an interconnection topology are selected for implementation within a switching system based on free-space digital optics.