Production problems attributed to excessive stresses generated during the cure of epoxies led us to develop a formalism to predict these stresses. In our first studies, we developed a fundamental understanding of the complex evolution of viscoelasticity as the cure progresses. We then incorporated these results into a proper tensorial constitutive equation that was integrated into our finite element codes and validated using more complicated geometries, thermal histories, and strain profiles. The formalism was then applied to the original production problem to determine cure schedules that would minimize stress generation during cure. During the pursuit of these activities, several interesting and puzzling phenomena were discovered that have stimulated further investigation.

The most commonly used solder for electrical interconnects in electronic packages is the near eutectic 60Sn-40Pb alloy. This alloy has a number of processing advantages (suitable melting point of 183°C and good wetting behavior). However, under conditions of cyclic strain and temperature (thermomechanical fatigue) the microstructure of this alloy undergoes a heterogeneous coarsening and failure process that makes the prediction of solder joint lifetime complex. A finite element simulation methodology to predict solder joint mechanical behavior, that includes microstructural evolution, has been developed. The mechanical constitutive behavior was incorporated into the time dependent internal state variable viscoplastic model through experimental creep tests. The microstructural evolution is incorporated through a series of mathematical relations that describe mass flow in a temperature/strain environment. The model has been found to simulate observed thermomechanical fatigue behavior in solder joints.

We report the first measurements of in-situ flip-chip assembly mechanical stresses using a CMOS piezoresistive test chip repatterned with a fine pitch full area array. A special printed circuit board substrate was designed at Sandia and fabricated by the Hadco Corp. The flip-chip solder attach (FCA) and underfill was performed by a SEMATECH member company. The measured incremental stresses produced by the underfill are reported and discussed for several underfill materials used in this experiment.A FEM of a one-quarter section of the square assembly has been developed to compare with the measured as-assembled and underfill die surface stresses. The initial model utilized linear elastic constitutive models for the Si, solder, underfill, and PC board components. Detailed comparisons between theory and experiment are presented and discussed. IntroductionThe manufacturability and reliability of a flip-chip assembled package are strongly influenced by the mechanical stresses developed in the die-solder ball-substrate region. These stresses are produced by differential thermal contraction between substrate and die, and the stress distributidn and magnitude can be significantly changed by the presence of an underfill material. It is highly desirable to model these stresses using the Finite Element Method (FEM) stress analysis technique so that the susceptibility to mechanical failure during thermal cycling can be predicted for new geometries

An expression for the coarsening rate of the Pb-rich phase particles was determined through isothermal aging experiments and comparative literature data as:where LOand k are the initial and final mean Pb-rich particle diameters, respectively (mm); T is temperature ("K); t is time (s); and dy/dt is the strain rate (s-l). The phase coarsening behavior showed good agreement with previous literature data from isothermal aging experiments. The power-law exponent, p, for the Pb-rich phase size coarsening kinetics:~~-~o~= t increased from a value of 3.3 at the low aging temperature regime (70°C-100°C) to a value of 5.1 at the high temperature regime (135°C-170"C), suggesting that the number of short-circuit diffusion paths had increased with further aging. This expression provides an important basis for the rnicrostructurally-based, constitutive equation used in the visco-plastic model for TNIF in Sn-Pb solder. The revised visco-plastic model was exercised using a through-hole solder joint configuration. Initial data indicate a satisfactory compatibility between the constitutive equation and the coarsening expression.

A microstructurally-based computational simulation is presented that predicts the behavior and lifetime of solder interconnects for electronic applications. This finite element simulation is based on an internal state variable constitutive model that captures both creep and plasticity, and accounts for microstructural evolution. The basis of the microstructural evolution is a simple model that captures the grain size and microstructural defects in the solder. The mechanical behavior of the solder is incorporated into the model in the form of time-dependent, viscoplastic equations derived from experimental creep tests. The unique aspect of this methodology is that the constants in the constitutive relations of the model are determined from experimental tests. This paper presents the constitutive relations and the experimental means by which the constants in the equations are determined. The fatigue lifetime of the solder interconnects is predicted using a damage paraneter (or grain size) that is an output of the computer simulation. This damage parameter methodology is discussed and experimentally validated. I NTRO DU CTlO Ndirectly related to the lifetime of the solder interconnects in the package. The solder interconnect is no longer simply an electrical conductor but is also the structural material that holds the package together. The importance of the reliability of solder interconnects increases as the trend in the electronics industry moves toward surface mount technology, smaller joints, and finer pitch. One of the serious challenges to solder joint reliability is failures that are a result of thermomechanical fatigue. In an electronic package, the solder is typically constrained between two materials with different coefficients of thermal expansion. Fatigue failures originate as cyclic strain is applied to solder joints when the package is exposed to thermal fluctuations caused by either ambient temperature changes or by heat dissipation from the integrated circuit devices in the package. A thermal fatigue failure of a solder interconnect is shown in Figure 1. The long term reliability of electronic systems is oftenThe solder typically used for electronic applications is the near-eutectic 60Sn40Pb alloy. The metallurgy and time-strain-temperature behavior of this solder alloy is Hli l!MSTf?lf3IJTION OF THIS DOCUMENT I S U N L I M m surprisingly complex and is n predicting the behavior and In the as-soldered condition, the Sn-Pb alloy has a two phase microstructure. This structure is metastable due to the high interfacial energy that results from the large number of phase boundaries present. Under thermomechanical fatigue conditions, this microstructure evolves into a heterogeneously coarsened band where all subsequently applied strain is concentrated. The evolution of this heterogeneous coarsening is shown in Figure 2 where the initial, as-solidified, microstructure can be compared to the heterogeneously coarsened structure in a 60Sn-40Pb solder joint. It is clearly important that the life predi...