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The purpose of this paper is to present a daiiipiiig algorithm for a Newton solver based 011 physical ratlier tliati iiiatlieiiiatical coiisiderations. Its perforiiiaiice will be coiiipared with a iiiore conventional technique [I]. Special attention is paid to siiiiulatiiig SO1 (silicon-011-iiisulator) with a floating substrate. Simple examples will be used to illustrate the nature of the ill-conditioning of this class of problems. Results will slioiv that the coiivergeiice criteria must be iiiucli tighter t liaii for coiiveiitioiial CMOS technologies otlierwise the terminal curreiits could be incorrectly evaluated.A standard technique for solving the classical semiconductor device equations is t o discretise them on a finite element or finite difference mesh and then linearise the terms a t each o f the grid points. These equations are then assembled into the linear system where the Jacobian A contains the derivatives of the equations with respect t o the variables, -b is the value of the equations at each node using the present variables and N is the update vector for these variables. This is solved iteratively, by Newton's method, until b and ic are sufficiently small t o within given convergence criteria.In practise, if Poisson and the current continuity equations are solved simultaneously, the Newton loop requires damping t o prevent divergence occuring. A very successful technique for doing this was developed by Bank and Rose [l]. In their method, only the fraction of the update that reduces the norm of the function b is accepted. Convergence is guaranteed using this algorithm. However, it is often possible to find a quicker -1;. Dr llryrr is a Resrarrh Associate of tlw Natioiial Funrl for Si:imtifiC Research (YFWO) of 8rlqiiiii; and Profrssor at the 1C.Y Letwen 174

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