No abstract

No abstract

Abstract. Nowadays, the multi-core architecture is adopted everywhere in the design of contemporary processors in order to boost up the performance of multitasking applications. This paper mainly exploits the multi-core capability for full HD video decoding speedup to meet realtime display. Hantro 6100 H.264 decoder is chosen as the reference decoder. The serial decoding algorithm in the Hantro 6100 H.264 decoder is replaced with a parallel decoding algorithm. . In this research work, macroblock level parallelism is implemented using the enhanced version of macroblock region partitioning (MBRP) is implemented for the parallel video decoding of H.264 video. The results show that the workloads are well-balanced among the processor cores. It is observed that the maximum speedup values are attained when the decoder is running with 4 threads on a 4 core system and 8 logical core system configuration. Moreover, it is also observed that there is no degradation of visual quality throughout the decoding process.

No abstract

H.264 video codec provides a wide range of compression options and is popularly implemented over various video recording standards. The compression complexity increases when low-bit-rate video is required. Hence, the encoding time is often a major issue when processing a large number of video files. One of the methods to decrease the encoding time is to employ a parallel algorithm on a multicore system. In order to exploit the capability of a multicore processor, a scalable algorithm is proposed in this paper. Most of the parallelization methods proposed earlier suffer from the drawbacks of limited scalability, memory, and data dependency issues. In this paper, we present the results obtained using data-level parallelism at the macroblock (MB) level for encoder. The key idea of using MB-level parallelism is due to its less memory requirement. This design allows the encoder to schedule the sequences into the available logical cores for parallel processing. A load balancing mechanism is added to allow the encoding with respect to macroblock index and, hence, eliminating the need of a coordinator thread. In our implementation, a dynamic macroblock scheduling technique is used to improve the speedup. Also, we modify some of the pointers with advanced data structures to optimize the memory. The results show that with the proposed MB-level parallelism, higher speedup values can be achieved.