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Purpose This paper aims to apply grey wolf optimizer (GWO) algorithm for steady state analysis of self-excited induction generators (SEIGs) supplying isolated loads. Design/methodology/approach Taking the equivalent circuit of SEIG, the impedances representing the stator, rotor and the connected load are reduced to a single loop impedance in terms of the unknown frequency, magnetizing reactance and core loss resistance for the given rotor speed. This loop impedance is taken as the objective function and minimized using GWO to solve for the unknown parameters. By including the value of the desired voltage as a constraint, the formulated objective function is also extended for estimating the required excitation capacitance. Findings The experimental results obtained on a three phase 415 V, 3.5 kW SEIG and the corresponding predetermined performance characteristics agree closely, thereby validating the proposed GWO method. Moreover, a comparative study of GWO with genetic algorithm and particle swarm optimization techniques reveals that GWO exhibits much quicker convergence of the objective function. Originality/value The important contributions of this paper are as follows: for the first time, GWO has been introduced for the SEIG performance predetermination and computation of the excitation capacitance for attaining the desired terminal voltage for the given load and speed; the predicted performance accuracy is improved by considering the variable core loss of the SEIG; and GWO does not require derivations of lengthy equations for calculating the SEIG performance.

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<p>This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.</p>