In this paper, a clock and data synchronizer (CDS) is presented to improve channel selectivity of digitally assisted super-regenerative receivers (SRRs).The proposed CDS performs phase and frequency adjustment of the quench signal using a fully digital open-loop architecture removing the need for conventional phase-locked loop (PLL) architectures. The required signal shaping of the recovered data is also performed by the proposed CDS to restore the nonreturn-to-zero data format without using any pulse width expander or sample and hold circuit. A multichannel SRR is implemented employing the proposed CDS where a Q-enhancement procedure is also adopted to further improve the channel selectivity. The proposed SRR operates at 2.4-GHz ISM band and supports a data rate of 1 Mb/s, while the sensitivity is about À88 dBm, and the selectivity is better than À18 dB at a 10-MHz offset frequency. Implemented using a 0.18-μm standard CMOS process and with a 1.1-V supply voltage, the proposed SRR consumes about 0.4 mW.

In this letter, a new wiggly structure of two-line directional couplers is presented in which the coupling part of the coupler has a saw-tooth with rectangular edges. It has been shown that this method can offer advantages of both saw-tooth and rectangular counterparts with phase velocity compensation over a wider frequency range and a lower possibility of deformations. To evaluate the proposed approach, a 21 dB directional coupler at the frequency range of 4-8 GHz is designed and fabricated on a RO4003C board.