The major concern for the governments and private network communication is the security of systems against eavesdropping and illegal access. To overcome such illegal access the security of modern computer systems uses public-ciphers key namely Rivest, Shamir and Adleman (RSA). The RSA provides both authentication and secrecy of communication. In conventional encryption method the cryptography using RSA provides good secrecy and reduces area but generates more delay due to time taken by the multiplication part. To overcome such a problem, a 32-bit RSA using modulo (2 n +1) multiplication based VLSI architecture is presented in this study. This method offers less delay with high performance which can be used in any communication network field. The proposed method is implemented using Xilinx 12.4 ISE and simulated in MODELSIM 6.3c.