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This paper proposes an approach for safe design of hardware embedded control systems. The approach is based on a combination of formal verification and discrete controller synthesis techniques. Formal verification is solicited to detect design errors and provide counterexamples, while the Discrete Controller Synthesis technique is used to correct those error since it attempts to enforce previously verified specifications which do not hold. It automatically produces control code, which is assembled to the erroneous component in order to provide a system correct by construction with respect to the specification to enforce. We illustrate the approach on a train controller subsystem taken from "Bomabardier Transport" company. Mots-clés-COTS, Vrification formelle, synthse du contrleur discret, systme evenements discrets, proprit de sret, proprit de vivacit, composant correct par conception.

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Hardware control is becoming a dominating topic in the field of engineering. Hands-on experience is one of the most crucial skills a fresh graduated engineer needs in order to find a job in industry or in academia. Raspberry PI is a new, user-friendly, open source, technology that allows developers to design and implement complex embedded systems using a small size and advanced single chip. This paper discusses the integration or Raspberry PI technology in the education of electrical and computer engineering curriculum, and its effect on the career of a freshly graduated electrical and computer engineer.

This paper investigates an industrial design issue related to code reusability: building control-command systems out of Commercial off the shelf (COTS) components. The design method proposed uses in synergy the formal verification (FV) and the discrete controller synthesis (DCS) techniques. COTS are formally specified using temporal logic and/or executable observers, and coded according to their formal specification. New functions are built by assembling COTS together. The COTS assembly operation is not error free: the resulting assembly may not achieve the desired function it is supposed to. For these reasons, COTS assemblies need to be formally verified and if errors are found, they must be corrected using DCS. The resulting system is ready for hardware (e.g. FPGA) implementation.