A variety of controllers are used in DC-DC converters. Among them, voltagemode control and current-programmed-mode control are widely used in industrial applications. In such controllers, however, values of inductor, output capacitor, and/or load condition usually affect loop stability and limit the performance of switching converter. Recently, load-independent-control (LIC) method is reported, where freewheeling current is fed back to overcome such a limitation [1]. While this is a viable solution in principle, it still has a vulnerable aspect that must be addressed: the feedback control is affected by the level of freewheeling current and an extra power switch is needed for freewheeling current flow which lowers power efficiency. Another LIC method using vestigial current control is reported in [2]. The weak points of vestigial control are that it needs an auxiliary output and power is consumed in steady state to regulate vestigial current. In this paper, we present a zero-order-controlled (ZOC) boost DC-DC converter that has a robust control loop and does not consume any extra power in the steady state.In the voltage mode, converter dynamics are second order due to the inductor and output capacitor. In contrast, the dynamics are reduced to first order in the current mode, since inductor dynamics are removed, leaving only capacitor dynamics. The proposed converter reduces converter dynamics further by removing both inductor and capacitor dynamics, and is thus dubbed zero-order control. The ZOC concept is previously proposed for LIC, however, we present a new control algorithm that overcomes the weak points of LIC converters. Figure 22.5.1 shows the block diagram of the ZOC boost converter. The operation principle can be explained using timing diagram of Fig. 22.5.2.The key idea of this controller is to find the optimum condition for balancing inductor energy at a minimum value during each switching cycle. Depending on whether inductor energy is excessive or not, duty cycle is adjusted to make freewheeling current (I W ) zero when a balanced condition is reached. The energy status of inductor is detected by adding a small sawtooth waveform (V ST ) to the output voltage (V 0 ). Owing to this V ST , inductor energy status can be reflected to on-time of Φ P , which is generated from the comparator (CMP O ) by comparing the composite signal (V 0X ) of V 0 and V ST with V REF . The V 0 is regulated by comparator (CMP O ) operation, and main current loop is controlled by rising edge difference between Φ P and driving signal (Φ N ) of NMOS switch, S N . When inductor energy is excessive, Φ P goes high during energy transfer period (D T ) before Φ N does. Therefore, the difference of rising edge between Φ P and Φ N indicates how much energy level has exceeded necessary energy, when Φ P leads Φ N . On the other hand, when inductor energy is lower than the necessary level, Φ P cannot go high during both D T and energy build-up period (D B ) without the help of V ST . In other words, in this case, Φ P goes high after Φ N o...
