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Global and Environmental variations together are responsible for differences in timing from one die to another for an ASIC design. The tried and tested method of corners and margins is still the dominant method in ASIC industry to assure the timing characteristics of a design. However, the increasing margins limit the scaling of maximum achievable frequency for a given die size, especially because of minimum pulse width violation. The importance of clock tree pulse-width variations due to global N-to-P mismatch is increasing with decreasing pulse width. To continue scaling the clock frequency, we may need to make application specific margins and corners. In this work, we have estimated the impact of pulse width variations on standard cells in a clock library using industrial models and spice simulations. We found that by unbalancing the first stage of a cell with respect to rise and fall edge in a multiple supply voltage design, we could halve the pulse width variations with minimal effect on delay and slew.Index Terms-Clock tree pulse width, global N-to-P mismatch

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<p>Photovoltaic (PV) production is strongly dependent on cloud cover behaviour. It can induce a very high variability of the production which is problematic for a safe and gainful injection into the power grid. Advanced forecasting solutions represent a major key to reliable PV systems. Satellite data are used to provide forecasts from 15 minutes until 6 hours ahead.</p> <p>To achieve cloud cover forecast, the first step consists in converting two successive satellite images into a cloud index map. Then, the movement of the clouds between these two images is obtained by analysing the optical flow, transformed into a Cloud Motion Vector (CMV) which is then applied on the image taken at T0 to extrapolate it and forecast the various cloud index maps up to T0 + 6h. Finally, the cloud index is combined with a clear sky model in order to compute the effective Surface Solar Irradiance.</p> <p>Over Europe, raw images are taken by EUMETSAT’s (European Organisation for the Exploitation of Meteorological Satellites) geostationary satellite. The satellite scans the Earth’s full disk in 15 minutes with the PRIME satellite positioned at 0°. However, the Rapid Scanning Service (RSS) scans the northern third of the Meteosat disk every five minutes, enabling more frequent data acquisition and lower delivery time. One satellite is dedicated to this operating mode and is positioned at 9.5°E.</p> <p>TRUSTPV is a European Union’s Horizon 2020 Research project whose purpose is to investigate and demonstrate the development of O&M-friendly and grid-friendly solar solutions in large portfolios of distributed and utility scale photovoltaics. Within TRUSTPV, we demonstrate the performance improvement provided by using the geostationary meteorological satellite's RSS to obtain images more frequently and therefore improve intraday forecasts. In this work, we forecast cloud cover every 5 minutes with a 5-minute time step. Then, we simulate PRIME operation with forecasts generated every 15 minutes with a 15-minute time step by using the same optical flow and extrapolation algorithms. Moreover, we take into account the latency in the access to the data in real time. The model outputs are compared to 10-minute solar radiation measurements from Deutscher Wetterdienst (DWD) stations located in Germany over the period ranging from 2021-09-01 to 2022-08-31. We determine the quarterly performance in order to study the seasonal effects. The results are also expressed in terms of relative Root Mean Scare Error (RMSE), RMSE Skill Score, Mean Absolute Error (MAE), MAE Skill Score, and mean bias error.</p> <p>Comparisons between forecasted surface solar irradiance at 30 minutes of time horizon and co-located pyranometric measurements show an improvement for all sites with a decrease of MAE around 4%. This gain brought by the RSS will improve the quality of power production forecasts of PV plants.</p> <p>The research leading to these results has received funding from the Horizon 2020 Research and invention Programme, under Grant Agreement No 952957, Trust-PV project.</p>

Many specific challenges need to be addressed in current SOC designs to offer a competitive product. Chip content become highly heterogeneous, performance has to be on the leading edge and robustness needs be guaranteed. Besides the technical merits, the "date of availability" of the product plays a key role in its overall competitiveness. Therefore, as schedule pressure is increasing, moving to new technology requires more parallelization of activities that used to done serially. When the technology brick, which is the first link of the chain, moves through various maturity levels, the whol edesign process may be impacted. Traditionally, the impact of such evolutions were not anticipated. Layout were updated as a consequence of design rules changes. "Brute force" timing margins were put in the models regardless of design specificities. Design For Variation techniques operate at design flow, SOC design and library/IP design levels to anticipate those variations. Different examples of Design Rules changes or Timing variations are discussed, and techniques to handle such changes are covered. Some aspects of Silicon process corners variations are also presented. Part of the talk covers clock network building techniques which are variation friendly. Impact of such techniques on final design analysis, also called SignOff are demonstrated. How DFV can simplify SignOff is finally discussed.