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Abstract-Teaching implementation of digital signal processing systems plays a very important role in recent technical education. The multi-core digital signal processor (DSP) is a new type of architecture widely used now in the industry. A new course on multi-core DSP programming is considered in this paper. The lab experiments are described. The course has been developed for the TMS320C6678 multicore DSPs. This paper provides educators with a content that cover theoretical and technical skills that are required by industry.

Fast Fourier transform (FFT) implementation on the TMS320C66x multicore digital signal processor (DSP) from Texas Instruments is considered in this paper. A FFT parallelization strategy is chosen and an expected performance gain is estimated. The algorithm is implemented in software for a four-core DSP architecture with interactions between cores based on inter-processor communication (IPC) and open multi-processing (OpenMP) techniques. Experimental results for a performance gain dependent on transform size are given. 2.9 times processing time reduction with 4 cores implementation is achieved.

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