Different metocean conditions have an impact on the detectability of ship signatures on Synthetic Aperture Radar (SAR) images. During the EMSec Project algorithms for retrieval of wind and sea state fields from TerraSAR-X data have been developed in conjunction with a near real-time-capable constant false alarm rate ship detection processor. This paper presents a new model connecting these three information extraction systems into a ship detectability model by setting the probability of detection in dependency to the four parameters: Wind speed, significant wave height, incidence angle and ship length. The model is based on a binary L2-regularized logistic regression classifier trained on a large dataset of X-band SAR ship samples, which are identified using Automatic Identification System messages co-located automatically in space and time and further checked manually to avoid possible mismatches. Results are compared to the state-of-the-art simulation-based ship detectability model available in literature. For the first time it has been possible to evaluate not only qualitatively but also quantitatively the effects of acquisition geometry and metocean conditions for the different image resolution classes obtainable with the high-flexible SAR sensor on-board the TerraSAR-X satellite.

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In the context of the project real-time services for maritime security (Echtzeitdienste für die Maritime Sicherheit-security), an experimental research platform for validation of maritime products derived from remote sensing data, was developed. This article describes the work carried out to derive ship-, wind-, and wave detection products out of Sentinel-1 remote-sensing data by DLR's Maritime Safety and Security Lab in Neustrelitz, part of the German Remote Data Center DFD. The activity aims to the fulfilment of project requirements, primarily to support the need for near real-time performance up to 15 min, as those in maritime situational awareness. The development and implementation cover the task of level 0 processing, based on DLR's front end processor, the implementation of the framework for real-time processing up to level 2 (value adding), as well as the development of a hardware-independent virtual-processing platform.