A fully-integrated RF Low Noise Amplifier (LNA) suitable for low-voltage applications is proposed using bipolar junction transistors (BJT) cascaded stages. The proposed design aims to provide gain with low bias current consequently lower power dissipation and lower Noise Figure (NF). The circuit is designed and simulated using MultiSim9 from Electronics Workbench DesignSuite Edition 9. The proposed amplifier exhibits 3.296dB smallsignal gain, reverse isolation of -6.68dB and 0.359dB noise figure at 1GHz. produce high output impedance that achieving large voltage gain.
is useful inThe schematic of the proposed LNA design is presented in Section II in which the elaborations on the LNA topology and typical trade-offs in the design are included. The experimental and simulation results are presented and analysed in Section IV. Section V summarizes the main contributions of this paper. The future prospects of the design are presented in Section VI.
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