Effective testing (validation, verification and evaluation) for expert systems is becoming important. In this paper we do a comparative evaluation of blackbox, white-boz, consistency and completeness testing methods based on the criteria of eflectiueness, robustness and cost. Testing methods are evaluated using "life-cycle mutation testing" on a VLSI manufacturing diagnostic expert system.
Effective testing of expert systems is an important but difficult task. In this paper we discuss why testing of expert systems is hard. For testing expert systems, testing techniques from conventional software engineering are adapted as a solution to these problems. We discuss the feasibility and application of black-box, white-box, and life-cycle testing techniques to expert systems. Black-box techniques include random, input partition and output partition testing. White-box techniques include path based partition, cause-effect graph, dynamic-flow, data-flow, and ablation testing. The use of these methods is demonstrated by applying the techniques to an industrial expert system. The results obtained are 1) random testing is feasible for expert systems with a small input space, 2) effectiveness of partition testing depends on the partition criteria, however, partition testing points out failure-prone partitions, 3) cause-effect testing is suitable for large expert systems if it is well decomposed, 4) dynamic-flow testing depends on the number of paths in solution and design specifications, 5) data-flow testing is feasible only if define-use pairs are obtained automatically, 6) ablation testing helps in pointing out discrepancies between specification and implementation. The overall result is that the expert systems can be treated as any other software and all the conventional software engineering testing techniques can be used to test expert systems.
Quadtree data structure, popular in 2-D applications, has not been studied in the context of VLSI embedding. This paper proposes two generic layout strategies for quadtree layout. Layout attributes are derived with primary focus on area-I/O trade-off. We demonstrate a simple layout mixing strategy to obtain improved boundary I/O characteristics. This is followed by development of a recursive layout mixing strategy which yields an order of improvement.
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