Metric temporal logic (MTL) and timed propositional temporal logic (TPTL) are quantitative extensions of linear temporal logic, which are prominent and widely used in the verification of real-timed systems. It was recently shown that the path-checking problem for MTL, when evaluated over finite timed words, is in the parallel complexity class NC. In this paper, we derive precise complexity results for the path-checking problem for MTL and TPTL when evaluated over infinite data words over the non-negative integers. Such words may be seen as the behaviours of one-counter machines. For this setting, we give a complete analysis of the complexity of the path-checking problem depending on the number of register variables and the encoding of constraint numbers (unary or binary). As the two main results, we prove that the path-checking problem for MTL is P-complete, whereas the path-checking problem for TPTL is PSPACE-complete. The results yield the precise complexity of model checking deterministic one-counter machines against formulas of MTL and TPTL.

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Because of the connection constraints of quantum devices, the quantum gate cannot operate directly on nonadjacent qubits. Quantum circuit mapping transforms a logical quantum circuit to a circuit that satisfies the connection constraints by adding SWAP gates for nonadjacent qubits. Global and local heuristic reordering strategies are proposed in this paper for quantum circuit mapping over linear nearest neighbor (LNN) architectures, which are one-dimensional topology structures, to reduce the number of SWAP gates added. Experiment results show that the average improvements of the two methods are 13.19% and 15.46%, respectively. In this paper, we consider the quantum circuit mapping problem for linear nearest neighbor (LNN) architectures. We propose a global heuristic qubit reordering optimization algorithm and a local heuristic qubit reordering optimization algorithm. Compared with the other algorithm results, the average improvements of the two methods for quantum cost are 13.19% and 15.46%, respectively. The two methods apply to the realization of quantum circuit neighboring over one-dimensional quantum architectures and can be extended to algorithms that work for other quantum architectures of different topologies.

We introduce SO-HORN r which is a revised version of SO-HORN and show that SO-HORN r captures P on ordered finite structures. We also introduce second-order extended Horn logic SO-EHORN and a superclass SO-EHORN r of it. We show that both of them capture co-NP on ordered finite structures by proving that SO-EHORN and SO-EHORN r have the same expressive power when only consider ordered structures.

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