No abstract

The Electrostatic discharge (ESD) capabilities of the gate-ground NMOS devices in the circuits with and without input capacitance are experimentally compared in this paper. The experimental results show that the input capacitor can reduce the ESD robustness, which has been explained in detail by using two-dimensional simulator. At last, a novel design is also proposed to improve the ESD protection behavior of the CMOS integrated circuits with the input capacitor. The proposed design is validated by using two-dimensional simulations and experimental analysis.