In today's obstetric practice we encounter increasing number of post caesarean pregnancies because of rise in primary caesarean due to multi factorial reasons. There is increasing concern by obstetricians for managing these cases for medical and legal point of view. Present study was undertaken to decide appropriate mode of delivery and to conduct the proper management of patients with previous lower segment caesarean section.

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This paper covers motivation for VLSI and FPGA both. We can improve the speed of processor by the help of proposed design using the technique of pipelining in 5 stages .This is done to improve the overall speed of the processor. As the speed increases less amount of time is required for processing hence we get a fast processor. We have also mentioned about the languages used for the design. Every module is designed in VHDL.Xillinx is the main software used for function.

BACKGROUND The aim of this study was to evaluate the causes of maternal deaths in Krishna Institute of Medical Sciences, Karad.