Ion-sensitive field-effect transistors (ISFETs) have gained a lot of attention in recent times as compact, low-cost biosensors with fast response time and label-free detection. Dual gate ISFETs have been shown to enhance detection sensitivity beyond the Nernst limit of 59 mV pH−1 when the back gate dielectric is much thicker than the top dielectric. However, the thicker back-dielectric limits its application for ultrascaled point-of-care devices. In this work, we introduce and demonstrate a pH sensor, with WSe2(top)/MoS2(bottom) heterostructure based double gated ISFET. The proposed device is capable of surpassing the Nernst detection limit and uses thin high-k hafnium oxide as the gate oxide. The 2D atomic layered structure, combined with nanometer-thick top and bottom oxides, offers excellent scalability and linear response with a maximum sensitivity of 362 mV pH−1. We have also used technology computer-aided (TCAD) simulations to elucidate the underlying physics, namely back gate electric field screening through channel and interface charges due to the heterointerface. The proposed mechanism is independent of the dielectric thickness that makes miniaturization of these devices easier. We also demonstrate super-Nernstian behavior with the flipped MoS2(top)/WSe2(bottom) heterostructure ISFET. The results open up a new pathway of 2D heterostructure engineering as an excellent option for enhancing ISFET sensitivity beyond the Nernst limit, for the next-generation of label-free biosensors for single-molecular detection and point-of-care diagnostics.

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Ion-sensitive field-effect transistors (ISFETs) are quite popular as compact, low-cost biosensors with fast response time and label-free detection1. They can be used as pH sensors or functionalized for complex biomolecule detection. The voltage sensitivity (Sv) in classical ISFETs is fundamentally limited to 59 mV/pH (Nernst limit). Surpassing the Nernst limit requires complex device architectures or novel transport phenomena. Sensitivity beyond the Nernst limit can be achieved using specific device architectures such as dual gate ISFETs2, negative capacitance ISFETs (NC-ISFET)3, tunnel ISFETs4, etc. Compatible architectures can be combined for further enhancements in sensitivity. First, we experimentally demonstrate a super-Nernstian hetero-ISFET that uses 2-D WSe2/MoS2 heterostructure in a double-gated configuration5. The schematic of the device structure is shown in Fig. 1(a) along with its dimensions. The fluid gate to the pH solution is biased at VFG = 0 V and the voltage sensitivity (SV) is extracted by applying bias to the back-gate (VBG). Fig. 1(b) shows the variation of drain current for change in VBG at different pH. The voltage sensitivity is also included in the same graph. The device uses charge screening due to the interface traps and inversion charges at the hetero-interface to modulate the back-gate transconductance (gmb), thereby allowing super sensitivity. Further enhancement in sensitivity is explored using technology computer-aided (TCAD) device simulator tool (Silvaco ATLAS) by integrating with different device architectures. First we model the baseline hetero-ISFET. The 2-D materials were modeled using their material parameters and 3-D equivalents of their density of states. Amorphous hafnium oxide (HfO2) was used as the dielectric. The mobile ions in the electrolyte were modeled as charge carriers in an intrinsic semiconductor, with its effective density of states varying as a function of pH. The simulation model was calibrated with the experimental device (at pH = 7), as shown in Fig. 2(a). The transfer characteristics of the back-gate at different pH and fixed VFG (= 0 V) for the simulated device is shown in Fig. 2(b). We note that the sensitivity from simulations is lower than the experimental device. This is likely due to non-ideal and 2-D material specific factors which are not accounted in simulations. Nevertheless, the simulated device also shows super-Nernstian sensitivity (Fig. 2(b), right axis), validating the model. Hence, the calibrated TCAD model is used as the baseline for further studies. Next, an NC-FE layer (aluminum-doped HfO2) was added to the top fluid-gate stack6. We have used a ferroelectric-metal-insulator-semiconductor (FMIS) stack for the proposed NC-hetero-ISFET. Fig. 3(a) shows the new top-gate stack with the FMI layer, which replaces the top-gate stack in the earlier schematic. The fluid-gate charge (QFG), and drain current (ID) as a function of VFG (VBG = 0 V), were obtained from the TCAD simulations. The 1-D Landau–Khalatnikov (L-K) equations were used to model the voltage across the FE layer (VFE = 2αQFG+4βQ3 FG = V' FG - Vint; where V' FG is the newly computed fluid-gate bias and Vint is the internal node voltage)7. The calculated Vint (for fixed V' FG) is coupled back into the ATLAS simulator to extract voltage sensitivity (SV) by sweeping VBG at different pH values. The fluid-gate transfer curve of the proposed NC-hetero-ISFET, in Fig. 3(b), clearly shows a steeper sub-threshold slope and higher ON current than the baseline device. The corresponding FE layer parameters are shown in Table 1. These improved fluid-gate characteristics contribute to an increased voltage-sensitivity (SV) when VBG is applied. The transfer characteristic (ID v/s VBG, at fixed V' FG) of the NC-hetero-ISFET at different pH values is shown in Fig. 3(c), along with the voltage sensitivity. Further, in Fig. 3(d), we compare the peak SV obtained at different V' FG. There is an improvement in voltage sensitivity (as much as ~ 100 mV/pH) over the baseline device when NC is introduced. The results pave the way for highly sensitive super-Nernstian ISFETs by combining 2-D heterostructure with NC effect. References: P. Bergveld, Sensors Actuators, B Chem., 88, 1–20 (2003). M. Spijkman et al., Appl. Phys. Lett., 98, 2011–2014 (2011). F. Bellando et al., Appl. Phys. Lett., 116, 173503 (2020) P. Dwivedi, R. Singh, and Y. S. Chauhan, IEEE Sens. J., 21, 3233–3240 (2021). S. Sanjay, M. Hossain, A. Rao, and N. Bhat, npj 2D Mater. Appl. 2021 51, 5, 1–8 (2021) S. Salahuddin and S. Datta, Nano Lett, 8, 405–410 (2008) F. I. Sakib, M. A. Hasan, and M. Hossain, IEEE Trans. Electron Devices, 69, 311–317 (2022). Figure 1

Herein, a multilayer MoS2‐based low‐power synaptic transistor using Ta2O5 as a back‐gate dielectric for mimicking the biological neuronal synapse is reported. The use of high‐k dielectric allows for a lower‐voltage swing compared with using conventional SiO2, thus offering an attractive route to low‐power synaptic device architectures. Exfoliated MoS2 is utilized as the channel material, and the hysteresis in the transfer characteristics of the transistor is exploited to demonstrate excitatory and inhibitory postsynaptic currents, long‐term potentiation, and long‐term depression (LTP/LTD), indirect spike timing‐dependent plasticity (STDP) based on single and sequential gate (Vg) pulses, respectively. The synapse had achieved a 35% weight change in channel conductance within 15 electrical pulses for negative synaptic gate pulse and 28% change for positive synaptic gate pulse. A complete tunability of weight in the synapse by spike amplitude‐dependent plasticity (SADP) at a low voltage of 4 V is also demonstrated.