The requirements of many wireless sensing applications approach, or even exceed, the limited hardware capabilities of energy-constrained sensing platforms. To achieve such demanding requirements, some sensing platforms have included low-power application-specific hardware-at the expense of generality-to pre-process the sensor data for reduction to only the relevant information. While this additional hardware can save power by reducing the activity of the microcontroller and radio, a unique hardware solution is required for each application, which presents an unrealistic burden in terms of design time, cost, and ease of integration. To diminish these burdens, we present a reconfigurable analog/mixed-signal sensing platform in this work. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used signal-processing blocks and circuit components that can be connected in any configuration. At the software level, this platform provides a framework for abstracting this underlying hardware. We demonstrate how to quickly develop new applications on this platform, ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection. We also demonstrate how to integrate this platform with commonly used wireless sensor nodes and embedded-system platforms.

Floating-gate (FG) transistors are a primary means of providing nonvolatile digital memory in standard CMOS processes, but they are also key enablers for large-scale programmable analog systems, as well. Such programmable analog systems are often designed for battery-powered and resource-constrained applications, which require the memory cells to program quickly and with low infrastructural overhead. To meet these needs, we present a four-transistor analog floating-gate memory cell that offers both voltage and current outputs and has linear programming characteristics. Furthermore, we present a simple programming circuit that forces the memory cell to converge to targets with 13.0 bit resolution. Finally, we demonstrate how to use the FG memory cell and the programmer circuit in array configurations. We show how to program an array in either a serial or parallel fashion and demonstrate the effectiveness of the array programming with an application of a bandpass filter array.

Since their introduction in 1967, floating-gate transistors have enjoyed widespread success as non-volatile digital memory elements in EEPROM and flash memory. In recent decades, however, a renewed interest in floating-gate transistors has focused on their viability as non-volatile analog memory, as well as programmable voltage and current sources. They have been used extensively in this capacity to solve traditional problems associated with analog circuit design, such as to correct for fabrication mismatch, to reduce comparator offset, and for amplifier auto-zeroing. They have also been used to implement adaptive circuits, learning systems, and reconfigurable systems. Despite these applications, their proliferation has been limited by complex programming procedures, which typically require high-precision test equipment and intimate knowledge of the programmer circuit to perform. This work strives to alleviate this limitation by presenting an improved method for fast and accurate programming of floating-gate transistors. This novel programming circuit uses a digitalto-analog converter and an array of sample-and-hold circuits to facilitate fast parallel programming of floating-gate memory arrays and eliminate the need for high accuracy voltage sources. Additionally, this circuit employs a serial peripheral interface which digitizes control of the programmer, simplifying the programming procedure and enabling the implementation of software applications that obscure programming complexity from the end user. The efficient and simple parallel program-First, I would like to express my gratitude to my adviser, Dr. David Graham, for his knowledge, guidance, and enthusiasm. I would also like to thank my labmates, Brandon Kelly, Alex Dilello, Mir Mohammad Navidi, and Stephen Andryzcik, for their assistance, suggestions, and useful discussion. I would especially like to thank Dr. Brandon Rumberg, whose work formed the foundation for my own and whose help proved invaluable. Lastly, I would like to thank my friends and family. Thanks to my parents, Jeff and Jeanne, for their love and support. Thanks to my grandfather, Gary, for rewarding me with $1.50 each semester I earned straight A's. Thanks to my brother, Ben, for humoring me when I wanted to talk about electronics. Also, thanks to my sister and brother-in-law, Nicole and Matt, for their encouragement. Thanks to my girlfriend, Keri, for her love and adoration, and for making sure I got home safely after sleepless nights spent in the lab. A final thanks goes to all those that remain unnamed, who provided me with a life fulfilled, outside of my studies.

To meet the demanding requirements in the growing area of wireless sensing applications, some sensing platforms have included low-power application-specific hardware to process the sensor data for compression and pre-classification of the relevant information. While this additional hardware can reduce the overall power consumption of the system, a unique hardware solution is required for each application. To diminish this burden, we will demonstrate a reconfigurable analog/mixed-signal sensing platform. At the hardwarelevel, this platform consists of a reconfigurable integrated circuit containing many commonly used circuit components that can be connected in any configuration to perform sensor interfacing and ultra-low-power signal processing. At the software level, this platform provides a framework for abstracting the underlying hardware. We will demonstrate how our platform allows a developer to create applications ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection, without the necessity of circuit-level expertise.