Mask inspection and qualification is a must for wafer fabs to ensure and guarantee high and stable yields. Single defect events can easily cause a million dollar loss through a defect duplicating onto the wafer.Several techniques and methods for mask qualification within a wafer fab are known but not all of them are neither used nor understood regarding their limitations. Increasing effort on existing tool platforms is necessary to detect the defects of interest which are at the limit of the tools specification -On the other hand next generation tools are very sensitive and therefore consume only a negligible amount of time for recipe optimization. Knowing the limits of each inspection tool helps to balance between effort and benefit.Masks with programmed defects of 90nm and 65nm design rule were used in order to compare the different available inspection techniques. During the course of this technical work, the authors concentrate mainly on two inspection techniques. The first one inspects the reticle itself using KLA-Tencor's SLF27 (TeraStar) and SL536 (TeraScan) tools. As the reticle gets inspected itself this is the so called "direct" mask defect inspection. The second inspection technique discussed is the "indirect" mask defect inspection which consists of printing the pattern on a blank wafer and use KLA-Tencor's bright-field wafer inspection tool (2xxx series) to inspect the wafer. Data of this work will include description of the techniques, inspection results, defect maps, sensitivity analysis, effort estimation as well as limitations for both techniques for the used design rule.KEY WORDS: mask defects, mask inspection, wafer inspection, disposition, limitations, lithography BACKGROUNDThere are significant needs for mask inspection in wafer fabs. Although many of the masks will remain problem free (clean) even after large number of exposures, previous publications from other fabs indicated that on an average, about 1% of binary masks (using at 365nm lithography) and 6 to 15% of EPSMs (using DUV lithography) show a defect growth problem over time of their usage in the fabs [1] [2]. Goal should be to identify these masks ahead of time by periodic monitoring and prevent them from production use before the defects reach the critical level.There are two techniques that are commonly used for mask monitoring in wafer fabs. Direct reticle inspection:a. STARlight TM b. Die to Die Transmitted light (ddT) c. Die to Die Reflected light (ddR) 2. Indirect reticle inspection, generally known as image qualification: This can be achieved via printing a wafer using the mask in question followed by inspection of that printed wafer. Two types of wafers can be used for this inspection: a. Test wafer: mask is printed on a test wafer (resist coated bare Si wafer)

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High resolution mask inspection in advanced wafer fabs is a necessity. Initial and progressive mask defect problem still remains an industry wide mask reliability issue. Defect incidences and its criticality vary significantly among the type of masks, technology node and layer, fab environment and mask usage. A usage and layer based qualification strategy for masks in production need to be adopted in wafer fabs.With the help of a high-resolution direct reticle inspection, early detection of critical and also non-critical defects at high capture rates is possible. A high-resolution inspection that is capable of providing necessary sensitivity to critical emerging defects (near edge) is very important in advanced nodes. At the same time, a way to disposition (make a go / no-go decision) on these defective masks is also very important. As the impact of these defects will depend on not only their size, but also on their transmission and MEEF, various defect types and characteristics have to be considered.In this technical report the adoption of such a high-resolution mask inspection system in wafer fab production is presented and discussed. Data on this work will include inspection results from advanced masks, layer and product based inspection pixel assignment, defect disposition and overall wafer fab strategies in day-to-day production towards mask inspection.

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