Wireless body area network (WBAN) is a prominent technology for resolving health-care concerns and providing high-speed continuous monitoring and real-time help. Human body communication (HBC) is an IEEE 802.15.6 physical layer standard for short-range communications that is not reliant on radio frequency (RF). Most WBAN applications can benefit from the HBC's low-latency and low-power architectural features. In this manuscript, an efficient digital HBC transceiver (TR) hardware architecture is designed as per IEEE 802.15.6 standard to overcome the drawbacks of the RF-wireless communication standards like signal leakage, on body antenna and power consumption. The design is created using a frequency selective digital transmission scheme for transmitter and receiver modules. The design resources are analyzed using different field programmable gate array (FPGA) families. The HBC TR utilizes <1% slices, consumes 101 mW power, and provides a throughput of 24.31 Mbps on Artix-7 FPGA with a latency of 10.5 clock cycles. In addition, the less than 10-4bit error rate of HBC is achieved with a 9.52 Mbps data rate. The proposed work is compared with existing architectures with significant improvement in performance parameters like chip area, power, and data rate.