P u b l i s h e d b y t h e I E E E C o m p u t e r S o c i e t y• circuit techniques such as disabling the clock signal to a processor's unused parts; • architectural techniques such as replacing complex uniprocessors with multiple simple cores; and • support for multiple low-power states in processors, memory, and disks.At the system level, the latter approach requires policies to intelligently exploit these low-power states for energy savings. Across multiple systems in a cluster or data center, these policies can involve dynamically adapting workload placement or power provisioning to meet specific energy or thermal goals. To facilitate these optimizations, we need metrics to define energy efficiency, which will help designers compare designs and identify promising energy-efficient technologies. We also need models to predict the effects of dynamic power management policies, particularly over many systems. Unlike the significant body of work on power management and optimization, there has been relatively little focus on metrics and models.We address the challenges in defining metrics for energy efficiency with a specific case study on JouleSort, which provides a complete, full-system benchmark for energy efficiency across a variety of system classes. Power consumption and energy efficiency are important factors in the initial design and day-to-day management of computer systems. Researchers and system designers need benchmarks that characterize energy efficiency to evaluate systems and identify promising new technologies.To predict the effects of new designs and configurations, they also need accurate methods of modeling power consumption.

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The energy efficiency of computer systems is an important concern in a variety of contexts. In data centers, reducing energy use improves operating cost, scalability, reliability, and other factors. For mobile devices, energy consumption directly affects functionality and usability. We propose and motivate JouleSort, an external sort benchmark, for evaluating the energy efficiency of a wide range of computer systems from clusters to handhelds. We list the criteria, challenges, and pitfalls from our experience in creating a fair energyefficiency benchmark. Using a commercial sort, we demonstrate a JouleSort system that is over 3.5x as energy-efficient as last year's estimated winner. This system is quite different from those currently used in data centers. It consists of a commodity mobile CPU and 13 laptop drives, connected by server-style I/O interfaces.

Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP are unable to fully utilize the datapaths in the vector lanes. In this paper, we propose vector lane threading (VLT), an architectural enhancement that allows idle vector lanes to run short-vector or scalar threads. VLTenhanced vector hardware can exploit both data-level and thread-level parallelism to achieve higher performance. We investigate implementation alternatives for VLT, focusing mostly on the instruction issue bandwidth requirements. We demonstrate that VLT's area overhead is small. For applications with short vectors, VLT leads to additional speedup of 1.4 to 2.3 over the base vector design. For scalar threads, VLT outperforms a 2-way CMP design by a factor of two. Overall, VLT allows vector processors to reach high computational throughput for a wider range of parallel programs and become a competitive alternative to CMP systems.

The technique of scaling hardware performance through increasing the number of cores on a chip requires programmers to learn to write parallel code that can exploit this hardware. In order to expose students to a variety of multicore programming models, our university offered a breadth-first introduction to multicore and manycore programming for upper-level undergraduates. Our students gained programming experience with three different parallel programming models, two of which are less than five years old and targeted specifically to multicore and manycore computing. Assessments throughout the semester showed that the course gave students a broad base of experience from which they will be able to understand ongoing developments in the field.