No abstract

The MPC105 peripheral component interconnection bridge/memory controller provides a platform-specification-compliant bridge between PowerPC microprocessors and the PCI bus. With it, designers can create systems using peripherals already designed for a variety of standard PC interfaces. This bridge chip also integrates a secondary cache controller and high-performance memory controller that supports DRAM or synchronous DRAM and ROM or flash ROM.

This report summarizes structural integrity work performed for the U.S. NRC that predicts the rupture pressure and leak rate of flawed steam generator (SG) tubes. The work includes pressure testing of straight tubes with lab-induced outer diameter stress corrosion cracks (ODSCC). Existing models for predicting rupture pressure and leak rate of straight tubes with well-defined, rectangular, electro-discharge-machined (EDM) flaws were modified and used to predict the measured rupture pressures and leak rates from straight tubes with ODSCC. Models previously developed for EDM notches in straight tubes were modified for ODSCC by using the equivalent rectangular crack (ERC) method.