Performance analysis of parallel scientific codes is becoming increasingly difficult due to the rapidly growing complexity of applications and architectures. Existing tools fall short in providing intuitive views that facilitate the process of performance debugging and tuning. In this paper, we exploit a recent idea of projecting and visualizing performance data on the communication and hardware domain for faster, more intuitive analysis of applications. We leverage several performance analysis and visualization tools to showcase the discovery of scalability bottlenecks in a structured AMR library. Using novel techniques to project per-phase timing data, application data, and communication data on a communication graph, we identify a previously elusive scaling bottleneck in the library. We present solutions that mitigate this problem, resulting in 22% improvement in the performance for a 65,536-core run on an IBM Blue Gene/P system.