The authors propose a technique to extract a silicon nitride trap density from stress induced leakage current in a polycrystalline silicon-oxide-nitride-oxide-silicon flash memory cell. An analytical model based on the Frenkel-Poole emission is developed to correlate a nitride trap density with stress induced leakage current. The extracted nitride trap density is 7.0×1012cm−2eV−1. They find that nitride trapped charges have a rather uniform distribution in an energy range of measurement (∼0.2eV).
We present an analysis of high-field hole transport in strained Si1−xGex alloys using a Monte Carlo technique. A bond orbital model is employed to calculate the valence-band structure in the simulation so that the transport behavior of high-energy holes can be described accurately. The model combines the k⋅p and the tight binding methods and contains no fitting parameters. The spin–orbit interaction and lattice-mismatch-induced biaxial compressive strain are included in the model. The steady-state hole drift velocity and the impact ionization rate are calculated as a function of an electric field up to 500 kV/cm. Good agreement between experiment and simulation is obtained.
Quantum confinement effects on hole mobility in silicon and germanium double gate p-channel metal-oxide-semiconductor field-effect transistors ͑MOSFETs͒ are studied by using a Monte Carlo method. Uniaxial stress and channel/substrate orientation effects are considered. Our result shows that the hole mobility in a ͑100͒/͓110͔ silicon well decreases with a decreasing well thickness, which is in agreement with the experimental result. The hole mobility in a germanium channel MOSFET, however, exhibits a peak in a sub-20 nm well because of the interplay between intrasubband and intersubband scatterings.Double-gate ͑DG͒ metal-oxide-semiconductor fieldeffect transistors ͑MOSFETs͒ and fin field-effect transistor have been considered as promising alternatives to bulk MOSFETs in 22 nm technology node and beyond 1-3 due to their immunity to short channel effects. Recently, advanced channel materials with higher carrier mobility than bulk Si, such as Ge ͑Ref. 4͒ and III-V materials, 5 have attracted much attention. Experimental works have shown the possibility that the inversion carrier mobility can be further improved in quantum structure MOSFETs by a subband modulation. 6,7 However, there has been little work on Ge-channel DGpMOSFETs addressing valence subband and substrate/ channel orientation effects on hole mobility.In this paper, we analyze quantum confinement effects on hole mobility as a function of a body thickness in Si-and Ge-channel DG-pMOSFETs. The low-field hole mobility is calculated by a Monte Carlo method. 8 The impact of substrate orientation on hole mobility is also evaluated. Furthermore, the effect of uniaxial compressive stress is discussed.Instead of the effective-mass approximation, the valence subband structures for two-dimensional holes in Si-and Gechannel DG-pMOSFETs are calculated self-consistently from the coupled Poisson and Schrödinger equations with a six-band Luttinger-Kohn Hamiltonian including spin-orbit coupling. 9 The Bir-Pikus deformation potentials 10 are also included to take into account the stress effect. In addition, an appropriate rotation matrix is employed when dealing with substrate orientations other than the ͑100͒ direction. 11,12 Material parameters, including Luttinger parameters, deformation potentials, and elastic constants used in the simulation, are given in Refs. 13-15. Relevant scattering mechanisms, including acoustic phonon scattering, optical phonon scattering, and surface roughness scattering, are considered in the Monte Carlo simulation. [16][17][18][19] The scattering parameters of Si and Ge are calibrated from a conventional Si MOSFET and from a SiGe-on-insulator device, respectively. 18 Figure 1 compares the hole mobility as a function of a body thickness in ͑100͒/͓110͔ Si-and Ge-channel DGpMOSFETs, where ͑͒ and ͓͔ are the notations of substrate orientation and channel direction, respectively. The choice of the ͓110͔ channel in Si is because it has a larger stress effect. The inversion hole density, p inv , is set to be 4 ϫ 10 12 cm −2 . The simulated hole mobi...
Articles you may be interested inLow-frequency noise characteristics of HfSiON gate-dielectric metal-oxide-semiconductor-field-effect transistors Appl. Phys. Lett. 86, 082102 (2005); 10.1063/1.1866507 Electron valence-band tunneling-induced Lorentzian noise in deep submicron silicon-on-insulator metal-oxide-semiconductor field-effect transistors J. Appl. Phys. 94, 4461 (2003); 10.1063/1.1604452Low-frequency noise overshoot in ultrathin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors Appl.Origin of microwave noise from an n-channel metal-oxide-semiconductor field effect transistor Evidence for an additional noise source modifying conventional 1/f frequency dependence in sub-μm metal-oxide-semiconductor field-effect transistors
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