As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever‐demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off‐current, great uniformity, and low‐temperature processibility with conventional complementary‐metal–oxide–semiconductor‐compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high‐end liquid crystal display devices and has now become a standard backplane electronic for organic light‐emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next‐generation electronics such as back‐end‐of‐line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short‐channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next‐generation electronics are discussed.

Achieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm2 V−1 s−1 and an ION/OFF ratio of 5.8 × 105 with 4-inch wafer-scale integrity on a SiO2/Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

Effects of lanthanum (La) loading on the structural, optical, and electrical properties of tin monoxide (SnO) films were examined as a p-type semiconducting layer. La loading up to 1.9 atom % caused the texturing of the tetragonal SnO phase with a preferential orientation of (101), which was accompanied by the smoother surface morphology. Simultaneously, the incorporated La cation suppressed the formation of n-type SnO2 in the La-doped SnO film and widened its optical band gap. These variations allowed the 1.9 atom % La-loaded SnO film to have a high hole mobility and carrier density, compared with the La-free control SnO film. The superior semiconducting property was reflected in the p-type thin-film transistor (TFT). The control SnO TFTs exhibited the field-effect mobility (μSAT) and I ON/OFF ratio of 0.29 cm2 V–1 s–1 and 5.4 × 102, respectively. Enhancement in the μSAT value and I ON/OFF ratio was observed for the TFTs with the 1.9 atom % La-loaded SnO channel layer: they were improved to 1.2 cm2 V–1 s–1 and 7.3 × 103, respectively. The reason for this superior performance was discussed on the basis of smoother morphology, suppression of disproportionation conversion from Sn2+ to Sn + Sn4+, and reduced gap-state density.

In this work, high-performance amorphous In0.75Ga0.23Sn0.02O (a-IGTO) transistors with an atomic layer-deposited Al2O3 dielectric layer were fabricated at a maximum processing temperature of 150 °C. Hydrogen (H) and excess oxygen (Oi) in the Al2O3 film, which was controlled by adjusting the oxygen radical density (PO2: flow rate of O2/[Ar+O2]) in the radio-frequency (rf) plasma during ALD growth of Al2O3, significantly affected the performance and stability of the resulting IGTO transistors. The concentrations of H and Oi in Al2O3/IGTO stacks according to PO2 were characterized by secondary ion mass spectroscopy, X-ray photoelectron spectroscopy, hard X-ray photoemission spectroscopy, and thermal desorption spectroscopy. The high concentration of H at a low PO2 of 2.5% caused heavy electron doping in the underlying IGTO during thermal annealing at 150 °C, leading to a conductive behavior in the resulting transistor without modulation capability. In contrast, a high PO2 condition of 20% introduced O2 molecules (or Oi) into the Al2O3 film, which negatively impacted the carrier mobility and caused anomalous photo-bias instability in the IGTO transistor. Through in-depth understanding of how to manipulate H and Oi in Al2O3 by controlling the PO2, we fabricated high-performance IGTO transistors with a high field-effect mobility (μFE) of 58.8 cm2/Vs, subthreshold gate swing (SS) of 0.12 V/decade, threshold voltage (V TH) of 0.5 V, and I ON/OFF ratio of ∼109 even at the maximum processing temperature of 150 °C. Simultaneously, the optimized devices were resistant to exposure to external positive gate bias stress (PBS) and negative bias stress (NBS) for 3600 s, where the V TH shifts for exposure to PBS and NBS for this duration were 0.1 V and −0.15 V, respectively.

This paper reports a new p-type tin oxyselenide (SnSeO), which was designed with the concept that the valence band edge from O 2p orbitals in the majority of metal oxides becomes delocalized by hybridizing Se 4p and Sn 5s orbitals. As the Se loading increased, the SnSeO film structures were transformed from tetragonal SnO to orthorhombic SnSe, which was accompanied by an increase in the amorphous phase portion and smooth morphologies. The SnSe0.56O0.44 film annealed at 300 °C exhibited the highest Hall mobility (μHall), 15.0 cm2 (V s)−1, and hole carrier density (n h), 1.2 × 1017 cm–3. The remarkable electrical performance was explained by the low hole effective mass, which was calculated by a first principle calculation. Indeed, the fabricated field-effect transistor (FET) with a p-channel SnSe0.56O0.44 film showed the high field-effect mobility of 5.9 cm2 (V s)−1 and an I ON/OFF ratio of 3 × 102. This work demonstrates that anion alloy-based hybridization provides a facile route to the realization of a high-performance p-channel FET and complementary devices.