We study the effect of ultra-thin oxide (SiO x) layers inserted at the interface of silicon heterojunction (SHJ) solar cells on their open-circuit voltage (V OC). The SiO x layers can be easily formed by dipping c-Si into oxidant such as hydrogen peroxide (H 2 O 2) and nitric acid (HNO 3). We confirm the prevention of the undesirable epitaxial growth of Si layers during the deposition of a-Si films by the insertion of the ultra-thin SiO x layers. The formation of the SiO x layers by H 2 O 2 leads to better effective minority carrier lifetime (τ eff) and V OC than the case of using HNO 3. c-Si with the ultra-thin SiO x layers formed by H 2 O 2 dipping, prior to deposition of a-Si passivation layers, can have high implied V OC of up to ~0.714 V.

The epitaxial growth of silicon (Si) films during the catalytic chemical vapor deposition (Cat-CVD) of intrinsic amorphous Si (i-a-Si) passivation films on crystalline Si (c-Si) wafers is suppressed by the oxidation of c-Si surfaces simply by dipping the c-Si wafers in hydrogen peroxide (H 2 O 2 ). This oxidation treatment is also effective for (111)-oriented c-Si surfaces particularly at high a-Si deposition temperatures. The suppression of the epitaxial growth leads to the better effective minority carrier lifetime (τ eff ) of c-Si wafers passivated with Cat-CVD i-a-Si films. SHJ solar cells show remarkably high open-circuit voltage (V oc ) exceeding 0.7 V. These results clearly show the effectiveness of the insertion of SiO x layers on the improvement in Cat-CVD a-Si/c-Si interfaces.

We apply phosphorus (P) doping to amorphous silicon (a-Si)/crystalline silicon (c-Si) heterojunction solar cells realized by exposing c-Si to Prelated radicals generated by the catalytic cracking of PH 3 molecules (Cat-doping). An ultrathin n + -layer formed by P Cat-doping acts to improve the effective minority carrier lifetime (τ eff ) and implied open-circuit voltage (implied V oc ) owing to its field effect by which minority holes are sent back from an a-Si/c-Si interface. An a-Si/c-Si heterojunction solar cell with a P Cat-doped layer shows better solar cell performance, particularly in V oc , than the cell without P Cat-doping. This result demonstrates the feasibility of applying Cat-doping to a-Si/c-Si heterojunction solar cells, owing to the advantage of the low-temperature (<200°C) process of Cat-doping.

We have recently developed a new structure for solar cells that consists of photonic nanostructures coupled with vertically aligned Ge quantum dots on a crystalline Si substrate. For the fabrication of a solar cell device, a heterojunction with a-Si:H was chosen because its processing temperature is less than 200 °C, at which point Ge atoms cannot diffuse into Si layers. In this study, we developed a guideline for the most appropriate cell structures to take advantage of the Ge layer by fabricating heterojunction solar cells with various structures. As a result, we confirmed that the carriers absorbed in Ge quantum dots contributed output current when Ge quantum dots are fabricated on the pn-junction side. Hence, the presence of built-in potential in a Ge dot layer was found to be necessary to extract the carriers generated in the Ge layer. In addition, carrier transport in Ge quantum dots is improved under conditions of reverse bias. Therefore, the electrical field in the Ge layer is a key parameter to improve solar cell performance in our proposed structure.

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