This paper provides the comparative study among various fabrication technologies for the same logical circuits based on NAND gate. The tool used for this analysis is Tanner which is an EDA tool and used for full custom designing of electronic circuits. The NAND gate is formed by CMOS only. The different technologies give varied output parameters with given input parameters. Hence, the main utilization of this study is to opt best suited technology for particular output parameter ranges for specified input parameter ranges for different applications based on logical gates. The conventional device generally used, consumes high power and is not stable with frequency variations. Therefore, a comparative analysis using different technologies is proposed, which has been useful for designing optimal conventional logics. The study is based on simulation of power consumption, noise analysis and frequency compensation technique of different gates.