Thermal conduction and mechanical stresses in through silicon via (TSV) structures in three dimensional system in package (3D SiP) under device operation condition were discussed. A large scale simulator, ADVENTURECluster® based on finite element method (FEM) was used to simulate the effects of voids formed inside Cu TSVs on the thermal conduction and mechanical stresses in the TSV structure. The thermal performance that was required in 3D SiP was estimated to ensure the reliability. Simulations for thermal stresses in the TSV structure in 3D SiP were carried out under thermal condition due to power ON/OFF of device. In case that void was not present inside the TSV, the stresses in TSV were close to the hydrostatic pressure and the magnitude of the equivalent stress was lower than the yield stress of copper. Maximum principal stress of the Si chip in the TSV structure for the case without voids was lower than that of the bending strength of silicon. However, the level of the stresses in the Si chips should not be negligible for damages to Si chips. In case that void was present inside the TSV, stress concentration was occurred around the void in the TSV. The magnitude of the equivalent stress in the TSV was lower than the yield stress of copper. The magnitude of the maximum principal stress of the Si chip was lower than that of the bending strength of silicon. However, its level should not be negligible for damages to TSVs and Si chips. The stress on inner surfaces of Si chip was slightly reduced due to the presence of a void in the TSV.

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The Wittig reaction of perfluorohalobenzaldehydes was systematically studied to investigate perfluorohalostyrenes (TFXS) as functional monomers of halogen bond-driven smart polymer materials. The reaction proceeded efficiently in THF using 1,1,3,3-tetramethylguanidine as the organic base. The number of nitrogen atoms in the organic base played an important role in the production of TFXS. The present approach does not only contribute to the study of halogen bond-based functional molecules but also presents digitalization as a potential strategy in organic synthesis.

Thermal conduction and mechanical strength around TSV (Through Silicon Via) structures of 3D SiP (Three Dimensional System in Package) were discussed both cases of with and without void in TSV by using a large scale simulator based on FEM, ADVENTURECluster® for ensuring the reliability of 3D SiP. In the results, the thermal performance that was required in 3D SiP was estimated to ensure the reliability. Simulations for thermal stresses around TSV structure in 3D SiP under thermal cycle condition due to power ON/OFF were carried out. In case that void was not in TSV, stresses in TSV were close to hydrostatic pressure and the magnitude of the equivalent stress was lower than the yield stress of copper. However, the level of the stresses, especially in Si chips, should not be negligible in inducing damages to TSVs and Si single crystals. In case that void was in TSV, stress was concentrated around void in TSV and the magnitude of the equivalent stress was lower than the yield stress of copper. The level of stresses applied to Si chip was slightly reduced due to void in TSV. However, its level should not be negligible in inducing damages to TSVs and Si single crystals.

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