The dynamic response of Sn3.5Ag solder balls interconnecting bilayered chip scale packages under boardlevel drop impact is studied in this paper. The structural response of the solder balls was obtained by finite element simulations of an elastic model of board-mounted assembly under the JEDEC-defined half-sine acceleration profile. The distribution of the von Mises stress and peeling stress were examined in the critical solders.The Hilbert-Huang Transform (HHT) technique was then used to calculate the implicit mode functions (IMFs) of the dynamic response at the critical solder balls. As each IMF carries important amplitude and frequency information intrinsically retained to the processed signals, the IMFs enable a preliminary analysis about questions such as how much of the solder stress buildup is contributed from board vibrations. IntroductionThe demand in high density packaging has driven the development of stacked chip scale packages (S-CSPs) [1], such as shown in Figure 1, in which multiple CSPs are stacked and interconnected in the z-direction. To understand the stress-driven failure modes in the stacked packages, in this paper a board-mounted, bilayered stacked CSP under boardlevel drop is studied.

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