In this paper, the effect of common-mode voltage generated in the three-level quasi-switched boost T-type inverter is minimized by applying the proposed space-vector modulation technique, which uses only medium vectors and zero vector to synthesize the reference vector. The switching sequence is selected smoothly for inserting the shoot-through state for the inverter branch. The shoot-through vector is added within the zero vector in order to not affect the active vectors as well as the output voltage. In addition, the shoot-through control signal of active switches of the impedance network is generated to ensure that its phase is shifted 90 degrees compared to shoot through the signal of the inverter leg, which provides an improvement in reducing the inductor current ripple and enhancing the voltage gain. The effectiveness of the proposed method is verified through simulation and experimental results. In addition, the superiority of the proposed scheme is demonstrated by comparing it to the conventional pulse-width modulation technique.

In this paper, a new optimal pulse-width modulation (PWM) scheme for a three-level quasi-switched boost T-type inverter (TL qSBT 2 I) under normal and failure modes is proposed. The proposed method reveals its semiconductor fault tolerance capability in open-circuit fault condition situations as described in the paper. The PWM control algorithm for the fault-tolerant qSBT 2 I is implemented by selecting appropriate values for the modulation index, shoot-through (ST) duty cycle and duty cycles of two additional switches. The steady-state analysis and operating principles of the fault-tolerant qSBT 2 I are presented. A laboratory prototype was built to verify the operating principles of the qSBT 2 I with the proposed modulation scheme before and after fault conditions.

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In recent years, the quasi -switched boost inverter uses widely in electrical systems. This paper proposes a method to control the AC output voltage and reduce the current ripple of the booster inductor in the quasi-switched boost inverter (QSBI). The proposed technique base on carrier pulse width modulation with two triangles with phase shifts 90◦. This technique uses the offset function to expand the modulation index and the algorithm for output voltage stabilization based on the adjustment of the boost ratio. The modulation index expansion will reduce the stress voltage on the switches by an average of 16.5% under the simulated conditions. The boost factor base on the short circuit time on the DC / DC booster and the inverter on the zero vectors. So, the duty ratio (of the boost DC / DC) can reduce by the short-circuit pulses that insert in the position of zero vectors, so the inverter is responsible for both boosting and inverting. The combination helps to reduce the current ripple on the boost inductor. Besides that, reducing the short-circuit ratio of DC / DC booster will also reduce the capacity of the booster switch and thereby reduce the production cost. The analysis clarifies the proposed technique. Simulations and experiments evaluate the proposed method.

In this paper, a new pulse width modulation (PWM) scheme using an offset function to reduce switching loss in the five-level H-bridge T-type inverter (5L-HBT2I) is proposed. The proposed modulation technique is implemented with a third harmonic offset voltage function. A new control voltage, that is adding the offset voltage into the initial control, is shifted to the top or bottom position of the carrier, simultaneously—where the absolute value of its load current is high or medium in comparison to other phase load currents. Due to reducing the intersection between a control voltage and the carriers, the number of switch commutations of the inverter is reduced. As a result of reducing the number of commutation count with a high current at the non-switching position, the switching losses of the inverter are decreased. Analysis and comparison of switching losses on the two-level and three-level inverters, which are components of 5L-HBT2I are presented. The power loss analysis on the 5L-HBT2I is performed. The proposed technique implements the switching loss reduction strategy based on setting the operation of the two-level inverter in six-step mode. PSIM software is used to clarify the proposed technique. The simulation results show that the total switching losses of the proposed technique in 5L-HBT2I reduce in comparison to the conventional sine PWM technique. A prototype is built to validate the proposed scheme. Simulation and experimental results match the analysis.