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Die singulation by mechanical sawing has been the primary technology used in semiconductor device fabrication for decades. However, as device structures continue to evolve to meet increasing performance requirements, fundamental limitations of the sawing operation have been exposed. Obtaining reasonable dicing throughput and yield for die less than 100µm thick is a challenge for the sawing operation. One alternative to saw-based dicing is die singulation using plasma etching. This paper compares and contrasts plasma dicing on tape (PDOT) processes to conventional mechanical saw and laser processes. While saw-and laser-based processes are serial in nature, plasma dicing is a parallel process, which significantly increases equivalent cutting speeds, particularly for die that are less than 150µm thick. Along with higher die throughput, plasma dicing can deliver higherquality die than alternative methods. Die singulated by plasma dicing have shown up to 9 times greater die strength than mechanically sawed die. Finally, the paper discusses issues and solutions related to PDOT process integration, including maintaining tape integrity, street definition / masking approaches, and downstream integration.

A novel Atomic Layer Deposition (ALD) process has been developed in which chemical precursors are co-injected and simultaneously reacted. The process demonstrates hafnium silicate films of uniform composition that can be easily tuned from <30 to >80 % Hf concentration to meet specific device requirements with excellent thickness control proportional to the number of process cycles. The film has been fully integrated into a CMOS structure and provides repeatable parametric results over a wide range of film compositions. In addition we review a VUV metrology technique correlated to X-ray photoelectron spectroscopy that enables measurement of the hafnium vs. silicon composition in very thin films <50 Å, with sensitivity to lower hafnium concentration in the interfacial layer for films deposited directly upon silicon substrates.

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To meet the changing demands of consumer product form factors, there has been a steady shift to thinner and smaller semiconductor die, both of which increase the challenges for die singulation. The traditional approach of saw dicing is facing new limitations due to die damage and throughput. Compounding these issues is the finite width of saw blades, saw blade loading from clearing multiple materials, and orthogonal layout restrictions. Laser dicing has been introduced to address some of these issues, but faces other limitations such as damage from the heat affected zone, ablation residues, throughput, and material incompatibilities (changes in transparency and absorption in the street). In some cases, a combination of both saw and laser has been utilized to surmount some of the technical obstacles. The recently introduced approach of front-side plasma singulation circumvents many of the limitations of saws and lasers. The technology presented in this work uses standard dicing tape and frames, is through-wafer complete die separation, and does not involve a subsequent wafer thinning or die cleaving step. Our approach utilizes lithographically defined singulation lines with typical widths of 10–15μm, and delivers chip/crack-free edges with low-stress rounded corners. The parallel nature of this singulation method enables non-orthogonal and non-linear singulation streets allowing die layout and design flexibility not achievable by saws and/or lasers. As a consequence, plasma singulation produces increased good die per wafer through better wafer area utilization, lower die failure (reduced corner stress with rounded geometry), and flexibility in die placement near wafer edge on larger die. One of the unique advantages is that this technology can be implemented without addition of any new masking layers but instead the use of the existing passivation, metals and/or upper dielectrics as masks. Implementing this technology across a wide range of die applications such as power, memory, logic, imaging sensors, LEDs, and MEMS must address a diverse range of variables such as compatible materials, bond pads/bumps, and backmetal. For dies with backside metal, a non-etch based method to allow full die separation while the dies are still attached to tape has been demonstrated.