The challenges of integrating an embedded RF function within a system-on-chip (SOC) are outlined. An aggressive market need, combined with stringent technical difficulties, drives the need for an improved design methodology. Architecture innovations allow optimal building of RF within advanced CMOS. Antenna coexistence and substrate co-habitation have also to be addressed especially in multi-mode platforms. Only total deployment of design for excellence (DFx) procedures enables achieving production yield and cost goals. Future technology will not only use 32 and 22nm nodes, but probably also SIP-based RF filters and MEMs.