Many common iterative or recursive DSP applications can be represented by synchronous data-flow graphs (SDFGs). A great deal of research has been done attempting to optimize such applications through retiming. However, despite its proven effectiveness in transforming single-rate data-flow graphs to equivalent DFGs with smaller clock periods, the use of retiming for attempting to reduce the execution time of synchronous DFGs has never been explored. In this paper, we do just this. We develop the basic definitions and results necessary for expressing and studying SDFGs. We review the problems faced when attempting to retime a SDFG in order to minimize clock period, then present algorithms for doing this. Finally, we demonstrate the effectiveness of our methods on several examples.

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Many common iterative or recursive DSP applications can be represented by synchronous data-flow graphs (SDFGs). Despite claims to the contrary, the unfolding of such graphs proves to be a non-trivial problem. We demonstrate this in this paper, as well as specify the circumstances under which unfolding may take place.