Resistive random-access memory (RRAM) crossbar arrays have shown significant promise as drivers of neuromorphic computing, in-memory computing, and high-density storage-class memory applications. However, leakage current through parasitic sneak paths is one of the dominant obstacles for large-scale commercial deployment of RRAM arrays. To overcome this issue without compromising on the structural simplicity, the use of inherent selectors native to switching is one of the most promising ways to reduce sneak path currents without sacrificing density associated with the simple two-electrode structure. In this study, niobium oxide (NbO x ) was chosen as the resistive switching layer since it co-exhibits non-volatile memory and metal−insulatortransition selector behavior. Experimental results demonstrate abnormal phenomena in the reset process: a rapid decrease in current, followed by an increase when reset from the on state. The current conduction mechanism was examined through statistical analysis, and a conduction filament physical model was developed to explain the abnormal phenomenon. Under optimized operation conditions, non-linearity of ∼500 and fast switching speeds of 30 ns set and 50 ns reset were obtained. The switching behaviors with the intrinsic selector property make the NbO x device an attractive candidate for future memory and in-memory computing applications.

In this study, a thin-film transistor with a heterogeneous channel structure was introduced into oxide semiconductors to improve their electrical properties, which resulted in high mobility and lower subthreshold swing...

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In this study, a novel structural design of the p‐type low‐temperature polycrystalline silicon thin‐film transistors (p‐type LTPS TFTs) applied to the pixel structure of displays is proposed. Compared to the conventional pixel structure of displays, the proposed architecture can achieve the aperture ratio improvement by stacking the switch thin‐film transistor and the storage capacitor in a pixel region to enlarge the active space. Therefore, the demands of high‐resolution characteristics, such as a high aperture ratio, and high pixel densities for high‐end displays or novel technologies, can be satisfied by the adoption of the proposed design concept. Furthermore, the discussion of experimental and simulated results in terms of device physics of the transistor indicates that proposed TFTs possess higher performance and reliability properties. By modulating the geometry of the drain‐connected bottom metal in stacked TFTs, output characteristics and hot carrier phenomenon in devices can be further improved. Time‐dependent transfer characteristics, extracted electrical parameters, and numerical simulation results are performed to support our design.