Application-specific ICs have been traditionally used to support the high computational and data rate requirements in medical ultrasound systems, particularly in receive beamforming. Utilizing the previously developed efficient front-end algorithms, in this paper, we present a simple programmable computing architecture, consisting of a field-programmable gate array (FPGA) and a digital signal processor (DSP), to support core ultrasound signal processing. It was found that 97.3% and 51.8% of the FPGA and DSP resources are, respectively, needed to support all the front-end and back-end processing for B-mode imaging with 64 channels and 120 scanlines per frame at 30 frames/s. These results indicate that this programmable architecture can meet the requirements of low- and medium-level ultrasound machines while providing a flexible platform for supporting the development and deployment of new algorithms and emerging clinical applications.

Traditionally, application-specific integrated circuits (ASICs) are used for supporting the computational and data rate requirements of medical ultrasound systems. Utilizing the previously-developed efficient front-end algorithms and the continuing advances in solid state devices, we developed a hybrid programmable architecture to support core ultrasound signal processing. With the advent of newgeneration digital signal processors (DSPs) (e.g., Texas Instruments' TMS320C6455 and IBM's Cell Broadband Engine), this hybrid field programmable gate array (FPGA)-DSP architecture can evolve towards a single-chip solution after overcoming the following challenges: (a) inefficient data access during dynamic focusing and (b) multiple, parallel datatransfer paths from ADCs. In this paper, we present a new single-DSP architecture, where an advanced DSP handles all the front-and back-end processing in software. To enable this new architecture, we have (a) developed a new stepwise dynamic focusing method, where the same delay curve is utilized for a group of samples along the depth direction and (b) investigated use of serial interfaces for ADC to DSP data transfer. It was found that the TMS320C6455 can meet the requirements of a 32-channel B-mode imaging system using 56.6% and 85.4% of the computing and serial I/O resources of the DSP, respectively. These results indicate that a single DSP chip solution can meet the hardware requirements for lowerend medical ultrasound systems.

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In Japan, bridges are inspected via close visual examinations every five years. However, these inspections are labor intensive, and a shortage of engineers and budget constraints will restrict such inspections in the future. In recent years, efforts have been made to reduce the labor required for inspections by automating various aspects of the inspection process. In particular, image processing technology, such as transformer models, has been used to automatically detect damage in images of bridges. However, there has been insufficient discussion on the practicality of applying such models to damage detection. Therefore, this study demonstrates how they may be used to detect bridge damage. In particular, delamination and rebar exposure are targeted using three different models trained with datasets containing different size images. The detection results are compared and evaluated, which shows that the detection performance of the transformer model can be improved by increasing the size of the input image. Moreover, depending on the target, it may be desirable to avoid changing the detection target. The result of the largest size of the input image shows that around 3.9% precision value or around 19.9% recall value is higher than one or the other models.

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